Category: Moore’s Law

The Future of SiP: Providing a BreadBoard in a Tiny Package

As Moore’s Law approaches retirement age^[1][2], the technological advances wrought through the improvements in silicon process technology are staggering. The ability to tailor a process for high power, high voltage power electronics vs low power, low voltage, extremely dense microprocessor and memories enables the proliferation of technology in the age of the Internet of Things (IoT). However, for all the advancements, each silicon component can only have one process; a compromise necessary for each circuit that needs to be optimally built. Where Moore’s Law left off from the perspective of the individual component, packaging technology has taken up the reigns. Packaging technologies are able push the boundaries of form, fit, and function beyond that which is possible with System on a Chip (SoC) technology. Systems in a Package (“SiP”s) can enable new levels of integration and size reduction for embedded systems^[3][4]. However, like the technologies that have come before it, SiPs require enormous investments of design time and effort. In this paper, we introduce the future of SiP: the Universal Connection Matrix (UCM) .  This allows for faster design and prototyping with SiP devices. Instead of large, monolithic designs, the UCM provides a breadboard in a package.

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SiP – Driving Heterogeneous Integration

It is always worth our while to review the state of the art of integrated circuit technology. As one who has been in the middle of it for over 40 years, it is interesting to see how we have advanced the technology by driving the learning curve, exploiting the physics of silicon and creating new ways to design billions of transistors into functioning, reliable, affordable products. The products that have revolutionized the world we live in.

I believe we are only at the beginning of a transition from integration at the component level to integration at the system level. The new heterogeneous integration method known at System-in-Package (SiP) will be the technology of choice.

That is why Octavo’s products and strategy are based on this proven technology platform known as SiP. Although the technologies associated with SiP integration have been around for over a decade and are well established in the semiconductor industry, they have not been exploited for system integration. Our goal is to develop these existing technologies, along with new concepts, to deliver to you unprecedented integration and design flexibility.

SiP technology will help increase the performance of products while increasing their reliability.

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Debating the Future of Processing Performance

I have been attending the IEEE’s premier Signal Processing conference, the International Conference on Acoustics, Speech and Signal Processing (ICASSP) for over 30 years. While at Texas Instruments, ICASSP was the perfect venue for me to meet with the signal processing research community, our customers (both present and future), the editors/analysts who were following the Digital Signal Processing explosion, and our competitors. It became my platform to influence the industry while at the same time sensing the direction in which it was moving. (Read More…)

Why System in Package Technology Must Replace System on a Chip Technology

System on a chip (SoC) technology has got us a long way, allowing for entire electronic systems to be integrated into a single microchip, and SoC technology has long been the driving force behind smaller and smaller electronic systems with higher and higher levels of performance. Like all great technologies, though, SoC technology must eventually give way to something even more innovative and effective. In an article published by Stephan Ohr on EE Times, Ohr discusses how the increasing costs of transistor scaling has made SoC technology less viable and has created a demand for a specialized design process, and we at Octavo Systems completely agree with that assessment. With current manufacturing trends demanding an efficient process to manufacture an entire electronic system at one time and at increasingly smaller sizes, SoC technology is no longer an optimal solution. Fortunately, we have  a replacement–System in Package (SiP) technology. (Read More…)

SiP Metrics – Is there a Moore’s Law equivalent?

In the landmark paper of 1965, Gordon Moore[1] made an observation stating that with cost of manufacturing per device falling, it becomes economical to pack more and more devices in an IC chip. In his paper, Moore projected the number of devices in an IC chip would double every one to two years. This observation soon took the form of a proxy for future growth estimates in the semiconductor industry.

For decades, Moore’s law has been the benchmark for semiconductor technology development, eventually becoming a roadmap and a self-fulfilling prophecy for IC development.  Figure 1[2] shows the growth of the number of devices in a semiconductor chip over time and tracks well with Moore’s projection. (Read More…)

System in Package: the Complement to Moore’s Law

Moore’s Law has served us well for over a half of a century.  It drove the semiconductor (SC) process technology roadmap.  It got us to think about putting more transistors on an integrated circuit to the point where it is no longer a nightmare to consider billions of transistors on one piece of silicon.  In fact, several years ago I began to use the phrase “transistors are becoming a buck a billion” to put a new perspective on the success of Moore’s Law.

But even with the great success the SC industry has had, we continue to find ourselves unable to accomplish the ultimate goal, a complete system on a chip.  Yes, we talk about System on Chip (SoC) technology as the solution (now what was the problem again?).  However, the advancements in IC technology have actually defeated the primary goal of SoC, the integration of a complete system on a single piece of silicon.  In the past I have actually suggested that it should be SSoC rather than SoC as all we have been able to do is a Sub-System on a Chip. (Read More…)

A Complementary Semiconductor Roadmap: System-In-Package (SiP) and the Challenges Ahead

Since the early 1960s, advances in semiconductor technology have been tracking Moore’s law. This “law”, based on a paper by Gordon Moore[i], states that the number of transistors per chip will double about every 18 months.  For decades Moore’s law has been the overarching benchmark for development in the Semiconductor industry, especially in regards to System-On-Chip (SoC) development. (Read More…)