Published On: January, 16, 2023 By: Eshtaartha Basu | Updated: September 18, 2023 by Greg Sheridan
This tutorial will walk you through creating various simple software applications in Vitis 2021.2 for a OSDZU3 System-in-Package based design. It will use the OSDZU3-REF platform as an example.
Here is a video that walk through this guide that you can follow along with!
At the end of this tutorial, you will be able to:
This app note assumes you’ve already gone through OSDZU3 Vivado Tutorial and have successfully generated a Vivado Hardware Platform file (.xsa). This hardware platform will be used as foundation for all the software applications created moving forward.
This tutorial will require the following software and hardware setups.
The software requirements for this tutorial are:
The hardware setup for this tutorial is:
Prior to generating/creating any software application, a Vitis Platform Project (that includes a BSP) must be generated for the hardware platform. The Platform Project will assemble and compile various drivers that relate to the peripherals in the hardware platform for later use in our applications.
Now that the Vitis Platform Project is generated, we can begin creating software applications. We will start by creating a simple Hello World application so that you can become familiar with the Vitis flow.
Please perform the following steps to setup the OSDZU3-REF board and host PC:
In this section, we will be using the SmartLynq JTAG Cable to load the Hello_OSDZU3x.elf executable file into the OSDZU3’s LPDDR4 memory and run it.
From the Vitis GUI Project Explorer, right click on the Hello_OSDZU3x software project and then select Run As > Launch Hardware.
You should see the phrase Hello World being displayed on the serial console window (Putty/TeraTerm/minicom/screen) as show below.
Now that a simple Hello World program has been loaded into the LPDDR4 memory and executed, in the next sections will try loading other software applications into the LPDDR4 memory and run them on the board.
In this section, we will use a simple software application (provided for you in the Sample Files) to flash the PS user LED on the OSDZU3-REF board.
The PS_LED_Blinky.elf executable file will be loaded into the LPDDR4 memory and run on the board. LED D6 (PS LED) will start flashing.
In this section we will use a simple software application (provided for you in the Sample Files) to flash all the 8 PL user LEDs (D20 – D27) on the OSDZU3-REF board.
The PL_LED_Blinky.elf executable file will be loaded into the LPDDR4 memory and run on the board. LEDs D20 – D27 (PL LEDs) will start flashing.
The Vitis Peripheral Tests software template can be used to test the PL DIP Switches (SW5) and Push Buttons (SW1 – SW4).
Once the hardware is launched, in order to test the User Switches and Push Buttons connected to the PL, the PL will be configured first. Once the PL is configured, the Periph_Test.elf file will be loaded into the LPDDR4 memory and run on the board.
Once the program starts running on the OSDZU3-REF board, you should see the following read data (highlighted) on the serial console. Read data under axi_gpio_0 corresponds to the status of push buttons. Read data under axi_gpio_1 corresponds to the status of DIP switches.
You can modify the status of push buttons and DIP switches few more times, relaunch the hardware each time and verify if the status of buttons and switches are being read properly.
The Vitis lwIP Echo Server software template can be used to test the Gigabit Ethernet Port.
telnet 192.168.1.10 7
In the previous sections, the Vitis debugger was used to load user executables into the OSDZU3-REF board’s LPDDR4 memory over the SmartLynq JTAG cable and run the programs on the board. This method of operation is ideal for debug environment. However, in normal operation user code and bitstream are loaded into the OSDZU3-REF board’s LPDDR4 and Zynq UltraScale+ via on-board primary/secondary boot devices such the microSD Card, QSPI Flash and the eMMC Flash. In the following sections we will show you how to:
In order to boot from any of the boot devices, a bootloader is required to load the user executable and bitstream into the OSDZU3-REF board’s LPDDR4 and the Zynq UltraScale+ PL. When the Zynq UltraScale+ initially boots, its internal ROM loads the bootloader (FSBL) from the external boot device into the Zynq UltraScale+ internal SRAM and releases the control to the FSBL.
FSBL will then load the user executable from the external boot device into the OSDZU3-REF board’s LPDDR4, loads the bitstream from the external boot device into the Zynq UltraScale+ PL, and then releases the control to the user executable. The following steps describe how to generate the FSBL.
In order to boot from the microSD card, the boot image must be generated and stored on the microSD card.
The Create Boot Image dialog box should look as shown in the following figure. Click on Create Image to create the SD card boot image.
The BOOT.BIN and output.BIF files will be generated in the bin_and_mcs_generation folder as shown in the following figure.
Using your PC’s memory card reader slot, copy the BOOT.BIN file generated in the previous step onto the root directly of the microSD card (you can also use a USB memory card reader adapter, if your PC does not have a microSD card reader slot). Remove the microSD card from the card reader.
We will continue to update this application note to provide more information and more examples. Sign up below to be notified when we update this guide.
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Revision Number | Revision Date | Changes | Author |
1 | 12/20/2022 | Initial Revision | Eshtaartha Basu |
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