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Published On: January, 16, 2023 By: Eshtaartha Basu | Updated: November 25, 2025 by Neeraj Dantu
Welcome to the OSDZU3-REF, a full featured development platform for the OSDZU3 System in Package. It provides access to most the commonly used peripherals on the OSDZU3. It also provides options for easy expandability through industry standard interfaces. This application note will walk you through the process of getting up and running with the OSDZU3-REF so you can quickly begin developing and prototyping your application.
This application note will be updated as the platform matures. Make sure you stay up to date on the latest by signing up for updates below.
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Note on Board Revisions:
This guide was written for Board Revisions 2x and latter. For board revisions 1x and earlier you will see a box like this one in the section outlining any differences to what is written. The Board Revision can be found below the fan next to the Octavo Systems Logo. See the image below for where to find it.
This tutorial may require the following software and hardware setup for some of the use cases.
The following additional hardware (not included in the box) have been used in this tutorial:
The OSDZU3-REF platform package includes the OSDZU3-REF platform itself as well as a 12V Power Supply, Display Port to HDMI adapter, µUSB to USB-A cable and a µSD card preloaded with the Octavo Systems Petalinux Distribution.
The video below will walk you through the OSDZU3-REF features and peripherals. It closely follows the steps outlined in this guide.
The completely Opensource OSDZU3-REF platform features:
Full schematics, layout, and other design files for the OSDZU3-REF can be found here.
Note on Board Revisions:
For revision 1x boards the OSDZU3EG1-2G-IFB-ES (Engineering Sample) is used. See ES Errata for more information on special considerations.
Other Changes Made between 1x revisions and later revisions include:
The OSDZU3-REF by default is set to boot from µSD card. It provides other boot options as well. These options are set using the 4-bit switches next to the USB host port.
To boot from µSD card, the boot switches must be set to SD1 as shown below. Please note that the Least Significant Bit (LSB) is on the left edge of the boot switch corresponding to “1” on-switch marking, and the Most Significant Bit (MSB) is on the right edge of the boot switch corresponding to “4” on-switch marking. The boot mode bits must be read from Right to Left (MSB to LSB) instead of the conventional left to right.
All the other boot mode options can be found in the OSDZU3-REF Schematics (see Note 2).
Note on Board Revisions:
Revisions 1x of the OSDZU3-REF do not support eMMC boot. This is because for ES devices, QSPI is connected to 3.3V power supply. Therefore, Bank 500 must be 3.3V IO. This means the eMMC interface (Bank 500) is using 3.3V IO. eMMC boot is available for 1.8V IO only. See section “Boot Modes” of Zynq Ultrascale+ TRM.
See ES Errata for more information on special considerations.
For Board revisions ≥ 2x, eMMC boot is supported because OSDZU3EG1-2G-IFB with Bank 500 voltage set to 1.8V is used.
The OSDZU3-REF comes with a µSD card pre-installed with Petalinux. This allows you to quickly evaluate different peripherals and interfaces as described in the following sections.
PetaLinux is a reference Linux distribution integrated and tested for AMD devices. The reference Linux distribution includes several packages including:
The Petalinux distribution from AMD has been adopted for OSDZU3 family and updated with following add-on packages, tools and PL IPs (PL instantiations) by our technology partner DesignLinx Hardware Solutions Inc for Octavo Systems:
You can also find the source and project files on the Software Section of the OSDZU3-REF product page.
Note: The Rest of this application guide assumes you are using the default Petalinux image that is loaded on the given µSD card.
The OSDZU3-REF can be powered through the DC barrel connector with the provided power supply. The included power supply is capable of delivering at least 3A@12VDC with a center-positive barrel connector of 2.5mm inner diameter and 5.5mm outer diameter. If you would like to use your own power supply, it must meet this spec.
Once the board is connected to power, flip the power switch (S2) to ON position. The 12VIN LED (D13) should illuminate indicating input power. The other three Power Good (PG) LEDs i.e., PG SiP, PG FMC and PG BRD should also come up indicating successful power up of SiP, FMC and the Reference Board respectively. The power switch (S2) can be used to turn the board ON/OFF as necessary.
The OSDZU3-REF with the default image supports 3 ways to interact with it:
This section will go through each of these approaches. It is assumed that the OSDZU3-REF is connected to the power supply but switched off for each of these approaches.
UART console provides critical, useful boot log information during OSDZU3 boot that helps debug any potential boot issues and determine if various hardware peripherals have come up successfully. Two UART interfaces (UART0 and UART1) of the OSDZU3 are made available on the OSDZU3-REF via µUSB port (thanks to USB to Dual UART Bridge) for added flexibility. By default, the Petalinux image provided by OctavoSystems uses UART1 interface for boot log output. We highly recommend that you access the UART console by connecting a USB-A to µUSB cable between the OSDZU3-REF and your PC. To do this:
OSDZU3-REF platform provides 2 ways to connect via JTAG:
The On-board JTAG-SMT2™ Programming Module is a fully self-contained USB to JTAG module from Digilent that can be directly accessed from Vivado or Vitis. The steps to establish a successful JTAG connection over Vivado and Vitis are described below.
Note on Board Revisions:
For board Revisions 1x, if you experience an issue using JTAG while running PetaLinux please refer to this forum post.
On Vivado:
On Vitis:
Note: If Vitis fails to identify JTAG-SMT2, you can reinstall drivers by following below methods:
To interact seamlessly with the Graphical User Interface (GUI) of the OSDZU3-REF, you can:
Refer Display Port output section below for more info.
OSDZU3-REF external display desktop is shown in image below.
The OSDZU3-REF has many common peripherals that are used in a wide variety of applications. This section will briefly explain how to use them with their default functionality.
By default, the Petalinux Image provided my Octavo Systems uses Display Port (DP) for external display output. Simply plug in a display port cable into the OSDZU3-REF and the other end into a Display Port monitor and you will see the default desktop. The Display Port can support up to 4K x 2K video @30 Hz video resolution as highlighted here https://docs.xilinx.com/r/en-US/ug1449-multimedia/DisplayPort-Interface.
If you do not have access to a display that supports Display Port you can use the provided DP to HDMI adaptor to connect to an HDMI monitor. You will then be able to see the default desktop. The maximum supported HDMI output resolution is same as Display Port maximum mentioned above.nux is a reference Linux distribution integrated and tested for AMD devices. The reference Linux distribution includes several packages including:
OSDZU3, by default, provides Display Port interface for video output. Display Port is excellent for computer monitors and other larger displays. However, for handheld and other smart devices that require smaller screens, Display Port interface is seldom used. To bridge this gap, our technology partner DesignLinx Hardware Solutions Inc. has developed a dedicated LVDS Display PL IP for Octavo Systems. This IP powers the LVDS display connector on OSDZU3-REF board.
OSDZU3-REF has one LVDS display panel connector (40pin, 0.5mm pitch, right-angle) on the bottom edge of the board, one touch connector (8pin, 0.5mm pitch, right-angle) on the top edge as shown in below picture below. OSDZU3-REF can support LVDS displays up to 3840 x 2160 resolution.
The default Octavo Systems Petalinux image will automatically switch between Display Port and LVDS. The Display Port is the priority display and will be selected as the output whenever it is connected. In order for the display to be output on the LVDS, the Display Port must not be connected.
LVDS displays that are known to work well with the Octavo Systems LVDS IP (at the time of writing this app note) are listed below. Please note that the device tree for the OSDZU3-REF must be changed to reflect the actual LVDS display panel and touch module being connected. The default device tree setting is for the GLT0701024600IS2-CTP panel shown below.
To power the LCD backlights, a dedicated LCD backlight driver IC is available on-board. LCD backlight can be configured using jumpers JP7 and JP17. Set the jumpers in their default positions shown below.
| Position 1-2 | Always enabled (default) |
|---|---|
| Position 2-3 | Control by ZU3 |
| Position 1-2 | Control by ZU3 (default) |
|---|---|
| Position 2-3 | Disabled |
The LVDS display backlight brightness can be controlled by writing brightness level (0 to 7) to brightness in /sys/class/backlight/backlight under Petalinux. Lowest brightness level is 0 and the highest is 7.
root@peta1inux—osdzu3—refdesign:/sys/class/backlight/backlight# echo 0 > brightness
root@peta1inux—osdzu3—refdesign:/sys/class/backlight/backlight# echo 3 > brightness
root@peta1inux—osdzu3—refdesign:/sys/class/backlight/backlight# echo 7 > brightness
The OSDZU3-REF has a USB3.0 Super Speed USB-C Host Interface that can be used to interface to a wide range of USB devices. An USB-C to USB-A hub may be required to connect devices with USB-A port.
Here is an example of a Logitech keyboard + mouse USB dongle connected to the USB-C host port via a USB-C Hub.
The OSDZU3-REF has a 1Gbit Ethernet port. This can be used to connect to any network and provide internet access. To use the Ethernet port, connect an ethernet cable to the OSDZU3-REF and to a compatible network switch.
If your network automatically assigns IP Addresses via DHCP the OSDZU3-REF will automatically receive an IP address.
Note on Board Revisions:
Board revisions 1x do not support eMMC boot due to reasons stated earlier. It is supported on revisions 2x and later.
OSDZU3-REF comes with a blank on-board eMMC.
You can start using eMMC as nonvolatile on-board storage once you mount it and reformat it as follows:
You can now use /emmc mount point to write and read data from the emmc.
The OSDZU3-REF comes with a SATA (Rev3.1) port. When you plug in a SATA drive you may see UART console messages indicating the SATA link coming up, its speed and other hardware information.
You can check for SATA drive using fdisk -l command. SATA drive is /dev/sda (466GB) in our example shown below. SATA drive can be partitioned, mounted and used as a mass storage device using the steps already laid out in the eMMC section above.
OSDZU3-REF has two EEPROMs available:
As a simple demo, we can write to and read from the OSDZU3 SiP’s internal EEPROM using “echo” and “hexdump” commands respectively, as shown in the below figure.
Ensure EPRM_WP on-board jumper is populated to disable the internal EEPROM’s write protection before writing to the EEPROM. When populated, EPRM_WP jumper shorts EEPROM_WP pin of the OSDZU3 SiP to GND. More info on this is available in the OSDZU3 datasheet and OSDZU3-REF schematic.
The OSDZU3-REF also has standard expansion interfaces that can be used to add functionality to the OSDZU3-REF platform. This section will provide a high-level overview of each of the expansion options.
The Pmod interface is used to connect low frequency, low I/O pin count peripheral modules (i.e., SPI, I²C, UART, I2S, H-bridge or GPIO protocols) to the OSDZU3-REF. The board provides dual PL Pmod ports (2 x 12 pins) and one PS Pmod port (1 x 12pins).
Various Pmod add-on boards are available here:
https://digilent.com/shop/boards-and-components/system-board-expansion-modules/pmods/
PMOD specification is available here:
https://digilent.com/reference/_media/reference/pmod/pmod-interface-specification-1_2_0.pdf
The pinout of PS PMOD header is given below.
| PMOD pin # | OSDZU3 pin | Function | Petalinux Kernel Default Object | Comments |
|---|---|---|---|---|
| 1 | MIO_41 | CS | spi0 n_ss_out[0] | |
| 2 | MIO_43 | MOSI | spi0 mosi | Shared with Click Interface, populate J22 to use MIO_36, populate J21 to use MIO_37 |
| 3 | MIO_42 | MISO | spi0 miso | |
| 4 | MIO_38 | SCK | spi0 sclk_out | |
| 5 | GND | GND | – | |
| 6 | +3.3V | +3.3V | – | |
| 7 | MIO_36 | INT | gpiochip9 36 | |
| 8 | MIO_37 | RESET | gpiochip9 37 | |
| 9 | MIO_39 | CS2 | spi0 n_ss_out[2] | |
| 10 | MIO_40 | CS1 | spi0 n_ss_out[1] | |
| 11 | GND | GND | – | |
| 12 | +3.3V | +3.3V | – |
Note on Board Revisions:
For board Revisions 1x the PS-PMOD connector implemented the incorrect specification for the PMOD header. It only supports a single row PMOD by default. If you would like to use a dual row PMOD you will need to swap Pins 1-4 with Pins 7-10 with a custom connector. See the below image for the Revision 1x PS-PMOD pinout.
Note: The 2021.2-1.0 and 2023.1-1.0 versions of the software (BSP, prebuilt images and Vivado projects) that shipped with OSDZU3-REF boards before 9/24/2024 have a bug in the PL-PMOD pin muxing. They only support single row PMOD add-on boards by default. This pinmux bug has been resolved in the latest version of the software (i.e., 2021.2-2.0, 2023.1-2.0, and later).
Please update to the latest version of the PetaLinux release found here..
The pinout of PL PMOD headers is given below.
| PMOD pin # | OSDZU3 pin | Function | Petalinux Kernel Default Object | Comments |
|---|---|---|---|---|
| 1 | JX2_HD_SE_03_N | CTS | ttyS2 (baud rate: 9600) | UART & GPIO interfaces are instantiated in PL by DesignLinx Hardware Solutions Inc. for Octavo Systems. |
| 2 | JX2_HD_SE_05_GC_N | TXD | ||
| 3 | JX2_HD_SE_07_GC_N | RXD | ||
| 4 | JX2_HD_SE_09_N | RTS | ||
| 5 | GND | GND | – | |
| 6 | +3.3V | +3.3V | – | |
| 7 | JX2_HD_SE_03_P | INT | gpiochip4 0 | |
| 8 | JX2_HD_SE_05_GC_P | RESET | gpiochip4 1 | |
| 9 | JX2_HD_SE_07_GC_P | GPIO | gpiochip4 2 | |
| 10 | JX2_HD_SE_09_P | GPIO | gpiochip4 3 | |
| 11 | GND | GND | – | |
| 12 | +3.3V | +3.3V | – |
| PMOD pin # | OSDZU3 pin | Function | Petalinux Kernel Default Object | Comments |
|---|---|---|---|---|
| 1 | JX2_HD_SE_02_N | INT | gpiochip5 0 | I2C & GPIO interfaces are instantiated in PL by DesignLinx Hardware Solutions Inc. for Octavo Systems. |
| 2 | JX2_HD_SE_04_GC_N | RESET | gpiochip5 1 | |
| 3 | JX2_HD_SE_06_GC_N | SCL | i2c bus 3 | |
| 4 | JX2_HD_SE_08_N | SDA | ||
| 5 | GND | GND | – | |
| 6 | +3.3V | +3.3V | – | |
| 7 | JX2_HD_SE_02_P | GPIO | gpiochip5 2 | |
| 8 | JX2_HD_SE_04_GC_P | GPIO | gpiochip5 3 | |
| 9 | JX2_HD_SE_06_GC_P | GPIO | gpiochip5 4 | |
| 10 | JX2_HD_SE_08_P | GPIO | gpiochip5 5 | |
| 11 | GND | GND | – | |
| 12 | +3.3V | +3.3V | – |
The OSDZU3-REF features a mikroBus header to help users take advantage of a wide range of sensors, actuators and UI devices available via pluggable Mikro Click add-on boards.
mikroBUS provides three groups of communications pins (SPI, UART and I2C), five additional pins (PWM, Interrupt, Analog input, Reset and Chip select), and two power groups (+3.3V, GND & 5V, GND).
See table below for detailed information on the available Click interfaces.
mikroBUS specification is available here: https://download.mikroe.com/documents/standards/mikrobus/mikrobus-standard-specification-v200.pdf
OSDZU3 pin to click header pin mapping is given in table below.
| Click header pin | OSDZU3 pin | Petalinux Kernel Default Object | Comments |
|---|---|---|---|
| AN | ADC (PS) | i2c 2-0014 | Uses dedicated I2C ADC on I2C1 bus, address 0x52 |
| RST | MIO_37 (PS) | gpiochip9 37 | Shared with PS_PMOD Interface, populate jumper J15 to use |
| CS | MIO_41 / MIO40 (PS) | spi0 n_ss_out[0] or spi0 n_ss_out[1] | Shared with PS_PMOD Interface; use jumper JP6 to choose between MIO_40 and MIO_41 |
| SCK | MIO_38 (PS) | spi0 sclk_out | Shared with PS_PMOD Interface |
| MISO | MIO_42 (PS) | spi0 miso | Shared with PS_PMOD Interface |
| MOSI | MIO_43 (PS) | spi0 mosi | Shared with PS_PMOD Interface |
| INT | MIO_36 (PS) | gpiochip9 36 | Shared with PS_PMOD Interface, populate jumper J16 to use |
| PWM | 44N_L6 (PL) | pwmchip0 | UART, I2C & PWM interfaces are instantiated in PL DesignLinx Hardware Solutions Inc. for Octavo Systems. |
| RX | 44N_L5 (PL) | ttyS3 (baud rate: 9600) |
|
| TX | 44P_L5 (PL) | ||
| SCL | 44N_L7 (PL) | i2c bus 1 | |
| SDA | 44P_L7 (PL) |
The FPGA Mezzanine Card (FMC) is an ANSI standard that provides a standard mezzanine card form factor, connectors, and modular interface to an FPGA located on a base board. Decoupling the I/O interfaces from the FPGA simplifies I/O interface module design while maximizing carrier card reuse. FMC was developed by a consortium of companies ranging from FPGA vendors to end users.
The FMC LPC interface on the OSDZU3-REF provides:
More detailed information on FMC cards is available here – https://fmchub.github.io/appendix/VITA57_FMC_HPC_LPC_SIGNALS_AND_PINOUT.html
NOTE 3:
FMC LPC interface usage requires suitable PL instantiation and OSDZU3-REF does not support FMC LPC interface usage out-of-the-box. Further discussion on FMC LPC is beyond the scope of this document.
FMC cards for various applications are available here – https://www.xilinx.com/products/boards-and-kits/fmc-cards.html
The OSDZU3-REF also has several on-board user LEDs, buttons and switches connected to both the PS and the PL of the OSDZU3 for easy interaction with the board.
The PL IP required to enable User GPIO functionality is developed by our technology partner DesignLinx Hardware Solutions Inc. for Octavo Systems.
The 8 PL User LEDs and one PS User LED are available under sysfs (/sys/class/leds) . The LED names are based on their respective on-board designators (D20, D24, D21 etc) and are listed below.
The LEDs can be turned ON or OFF by writing 1 or 0 to their “brightness” property.
echo 1 > /sys/class/leds/led0-d20/brightness
echo 0 > /sys/class/leds/led0-d20/brightness
As a simple demo, you can use the following command to make a pattern shown below.
The PL standard GPIOs can be accessed using the libgpiod utilities that come with Petalinux. You can view all the available GPIOs by running the “gpiodetect” command.
The 8 PL User DIP Switches are available in petalinux under “gpiochip8”. The switch number and the corresponding GPIOchip8 number is outlined in the table below.
| User PL DIP Switch Number on SW5 | Gpiochip8 number |
|---|---|
| 1 | 0 |
| 2 | 1 |
| 3 | 2 |
| 4 | 3 |
| 5 | 4 |
| 6 | 5 |
| 7 | 6 |
| 8 | 7 |
You can check their input status using the following command.
gpioget 8 0 1 2 3 4 5 6 7
The 3 PL User Push Buttons SW1, SW2, SW3 are available in petalinux under “gpiochip6”. SW4 is configured as a PL reset button in the default reference board configuration. It can be reconfigured for other purposes in the hardware platform for the OSDZU3-REF.
| User PL Push Button on-board designator | Gpiochip6 Pin Number |
|---|---|
| SW1 | 0 |
| SW2 | 1 |
| SW3 | 2 |
| SW4 | PL Reset |
To access the state of the push buttons, use the gpioget command with the gpiochip number followed by the gpio pin numbers.
gpioget 6 0 1 2
Example Output of Button State
| Revision Number | Revision Date | Changes | Author |
|---|---|---|---|
| 1 | 01/03/2023 | Initial Revision | Eshtaartha Basu |
| 2 | 02/17/2023 | Minor updates - Revision History table added, Additional Interfaces section updated | Greg Sheridan |
| 3 | 07/19/2023 | Minor updates to sections Platform Overview, Boot Options, Powering the OSDZU3-REF, UART, JTAG, EEPROM, Additional Interfaces. Tutorial Requirements section added. | Eshtaartha Basu |
| 4 | 08/23/2024 | Added Warning about PMOD header incompatibility | Eshtaartha Basu |
| 5 | 09/24/2024 | Updated PL PMOD for new software version | Eshtaartha Basu |
| 6 | 11/26/2025 | Updates for Board Revision 2A | Neeraj Dantu |
There has been multiple revisions to the OSDZU3-REF and some of the documentation is for specific revisions.
The revision of your OSDZU3-REF is printed under the fan next to the Octavo Systems logo. See the image below.
If there are multiple versions of a document make sure you select the one that matches your revision.
