[gil_he]

Hi Neeraj,

We did use this, https://octavosystems.com/app_notes/osd32mp1-red-getting-started/#UART%20Connection, as a guide.
We followed the guidelines regarding HW connections and UART speeds.

We used the two images that were mentioned in the above guide:
Octavo Systems Debian Linux Distribution | Version: 1.2 | February 22, 2021
OpenSTLinux Starter Image Distribution | Version: 1.2 | February 19, 2021

Same results with both.

thanks
Gil

[gil_he]

Got it.
Thank you !

[gil_he]

hello Neeraj,

As far as I can see, a 32KHz LSI is integrated in the STM32MP153C/F.
See stm32mp153c datasheet pages 30,151.

Can’t it be used?
Why do I need an external 32KHz oscillator? (32KHz LSE).

Another question:
The LSE is mainly used for RTC/AWU and .If I don’t require RTC support, is this oscillator required?

thanks,
Gil

• This reply was modified 3 years ago by gil_he.
• This reply was modified 3 years ago by gil_he.

[gil_he]

ok.
Got it.
thanks.

[gil_he]

hello Neeraj,

I visited the sites you mentioned.
Something is not clear to me:
1. What is the usage of STLINK-V3SET? Can it be used to debug the Linux on A7 core (with GDB) or only the M4 core?
2. Using GDB to debug/trace the Linux system running on the A7 core: how do I connect the PC to the STM32MP15 SoC to allow the debug?

thanks
Gil

[gil_he]

hello Neeraj,

How can we debug the Linux kernel?
Which hw tools can we use?

Can’t JTAG help debug the Linux kernel (running on the dual core A7) using the STLINK-V3SET?

thanks
Gil

[gil_he]

hello Neeraj,

I am combining here also this thread, https://octavosystems.com/forums/topic/changing-default-buck3-voltage/, so we communicate only through here.
The issues are similar.

We decided to use eMMC in DDR52 mode only, so PMIC programming is not required (vdd can remain 3.3V).
However, I want to verify/confirm with you the following:
1. On first power-up, when on-board storage is not programmed, accessing the SiP can ONLY be done from UART or USB.
Boot mode pins should define UART/USB.
2. STM32CubeProgrammer is running on the host pc and has the FSBL and SSBL which are loaded and run.
After they run, we can use the STM32CubeProgrammer to program our image to the eMMC Flash.
3. On first power-up, if we choose NoBoot mode, we can connect JTAG but nothing happens (ROM code goes into infinite loop).
Can JTAG be used, in that mode, to program the eMMC Flash? (with the STM32CubeProgrammer).
4. If we want to debug the platform with JTAG, should we have the NoBoot mode? Or should we normally have eMMC boot mode?

thanks
Gil

[gil_he]

Hello Neeraj,

Part of board bring-up is programing the PMIC NVM.
Please confirm:

Option 1:
Use the M4 core to run baremetal code.
This will be done via JTAG (load/run the code on the M4 core).
STLINK probe will be used.
Boot mode 100.
Will the A7 need to run Linux to support this environment?

Option 2:
Use ST’s Cube Programmer.
This will be done via JTAG (access the STM32MP1 and PMIC).
STLINK probe will be used.
Boot mode 100.
Will the A7 need to run Linux to support this environment?

Are the two options valid to perform PMIC NVM programming?

Are the libraries for the M4 core code provided by the STM32CubeIDE?
Will we use C libraries or assembly code for the baremetal code?

thank you
Gil

• This reply was modified 3 years, 1 month ago by gil_he.
• This reply was modified 3 years, 1 month ago by gil_he.

[gil_he]

hello Neeraj,

1. According to STM32CubeProgrammer data, it supports debug through ST-LINK debug probe (JTAG).
I know the PMIC doesn’t have a JTAG interface, but it connects through I2C4 to the STM SOC, and that allows the SOC access to the PMIC NVM.
That is my path to the PMIC NVM. The STM32CubeProgrammer uses this path to access and program this NVM (via JTAG).
Am I correct?
Does using JTAG require BOOTn=100 or does the JTAG anyway takes control once a debug probe is connected at power up?

2. I see I2C4 is accessed through APB5 bus which is accessed by the AHB bus master, M4.
The DAP (JTAG/SWD) is accessed via the DAP bus which connects to M4.
Is that why M4 is being used for accessing the NVM?
The DAP (JTAG/SWD) is also accessed by the AXI bus master, A7.
Am I correct?
Is the STM32CubeProgramme JTAG access transparent to the user, or should I take ay design measures to support that?

3. Programming the PMIC NVM procedure:
– Allowing the system to power up fully.
– Either by an I2C header or STM32CubeProgrammer (via JTAG):
disable VDD3V3_USBHS (PMIC LDO4).
change VDD (BUCK3) to 1.8V
– VDDA1V8_REG gets 1.8V as an input (internally). Its output is not regulated but will not cause any damage or affects MTBF of the SIP. Is that correct?
– Power off. Connecting BYPASS_REG1V8 pin to VDD and connecting VDD externally to VDDA1V8_REG pin.
– Power on.
Is the procedure ok?

thanks
Gil

[gil_he]

Hi Neeraj,

In addition to the above, if I hold NRST low and PMIC outputs are disabled, VDD (BUCK3) will also be disabled, thus I will not have VIO which is mandatory for PMIC NVM programming (VIO is connected to VDD internally in the SIP).

This is the first power-up of the SIP. Later power-ups will not need to do that.
1. BYPASS_REG1V8 is connected to GND.
VDDA1V8_REG is floating.
2. The system powers up.
3. Now, I am looking for a mechanism/method to do the following in the PMIC: disable VDD3V3_USBHS, change VDD (BUCK3) to 1.8V in the PMIC NVM.
How do you suggest I do that?
I can use an I2C header as described in dm00682242-the-stpmic1-ic-programming-guide-stmicroelectronics.pdf and program the PMIC NVM externally.
I can connect through JTAG to the SIP and access/program the PMIC NVM – is that feasible?
Any other way? What do you think?
4. Once VDD is changed to 1.8V in the NVM, I am powering the system off. Connecting BYPASS_REG1V8 and VDDA1V8_REG to VDD (resistors).
From now on, all power-ups are according to the PMIC NVM.

thanks
Gil

[gil_he]

Hi Neeraj,

When connecting to the SIP through JTAG:
Can the NVM of the PMIC be programmed via JTAG?
Which SW can be used for that?

thanks
Gil

• This reply was modified 3 years, 2 months ago by gil_he.

[gil_he]

Hi Neeraj,

The situation I described is for a board with the SiP assembled on it.
Default BUCK3 voltage is 3.3V (on first power-up, before any programming) and the connections on the board are as I described (BYPASS_REG1V8 and VDDA1V8_REG pins connect to VDD=3.3V).
So, it will put VDDA1V8_REG in bypass mode and will connect 3.3V (on first power-up), through the VDDA1V8_REG pin, to the USB HS PHY, which is wrong (it should get 1.8V).

Will the guide you referred me to, answer this scenario?

thanks
Gil

• This reply was modified 3 years, 2 months ago by gil_he.

[gil_he]

hello,

Please ignore the first post on this thread and consider the following (I edited the post, but something went wrong):

We will be using the OSD32MP157C-512M-BAA.
The default voltage for BUCK3 and BUCK4 is 3.3V.
I want to change it to 1.8V.
In the design, BYPASS_REG1V8 and VDDA1V8_REG pins connect to VDD, and will get 1.8V.
This is correct for a VDD=1.8V.
However, on first power-up of the system, 3.3V will be present there by default.
This will put VDDA1V8_REG in bypass mode and will connect 3.3V (through the VDDA1V8_REG pin) to the USB HS PHY, which is wrong.

How should I handle this?
BYPASS_REG1V8 will connect to VDD, thus in bypass mode.
VDDA1V8_REG pin will be floating. Thus, VDDA1V8_REG is not powered and USB PLL (in USB HS PHY) will not be get its 1.8V.
VDD3V3_USBHS will be disabled on power-up by default (fulfil the “VDDA1V8_REG must be present before VDD3V3_USBHS” requirement)
BUCK3 will change to 1.8V through the STM and once it is 1.8V, connect VDD to VDDA1V8_REG pin (either power-down the system and do that, or electrically relay VDD to this pin).
Enable VDD3V3_USBHS and change its power-up state to the appropriate rank.

Is that a valid way?

Any better way to do that?

thanks
Gil

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