gil_he

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  • in reply to: Changing default BUCK3 voltage #11987
    Gil Hershmangil_he
    Participant

      Hi Neeraj,

      When connecting to the SIP through JTAG:
      Can the NVM of the PMIC be programmed via JTAG?
      Which SW can be used for that?

      thanks
      Gil

      • This reply was modified 2 years, 10 months ago by Gil Hershmangil_he.
      in reply to: Changing default BUCK3 voltage #11975
      Gil Hershmangil_he
      Participant

        Hi Neeraj,

        The situation I described is for a board with the SiP assembled on it.
        Default BUCK3 voltage is 3.3V (on first power-up, before any programming) and the connections on the board are as I described (BYPASS_REG1V8 and VDDA1V8_REG pins connect to VDD=3.3V).
        So, it will put VDDA1V8_REG in bypass mode and will connect 3.3V (on first power-up), through the VDDA1V8_REG pin, to the USB HS PHY, which is wrong (it should get 1.8V).

        Will the guide you referred me to, answer this scenario?

        thanks
        Gil

        • This reply was modified 2 years, 10 months ago by Gil Hershmangil_he.
        in reply to: Changing default BUCK3 voltage #11962
        Gil Hershmangil_he
        Participant

          hello,

          Please ignore the first post on this thread and consider the following (I edited the post, but something went wrong):

          We will be using the OSD32MP157C-512M-BAA.
          The default voltage for BUCK3 and BUCK4 is 3.3V.
          I want to change it to 1.8V.
          In the design, BYPASS_REG1V8 and VDDA1V8_REG pins connect to VDD, and will get 1.8V.
          This is correct for a VDD=1.8V.
          However, on first power-up of the system, 3.3V will be present there by default.
          This will put VDDA1V8_REG in bypass mode and will connect 3.3V (through the VDDA1V8_REG pin) to the USB HS PHY, which is wrong.

          How should I handle this?
          BYPASS_REG1V8 will connect to VDD, thus in bypass mode.
          VDDA1V8_REG pin will be floating. Thus, VDDA1V8_REG is not powered and USB PLL (in USB HS PHY) will not be get its 1.8V.
          VDD3V3_USBHS will be disabled on power-up by default (fulfil the “VDDA1V8_REG must be present before VDD3V3_USBHS” requirement)
          BUCK3 will change to 1.8V through the STM and once it is 1.8V, connect VDD to VDDA1V8_REG pin (either power-down the system and do that, or electrically relay VDD to this pin).
          Enable VDD3V3_USBHS and change its power-up state to the appropriate rank.

          Is that a valid way?

          Any better way to do that?

          thanks
          Gil

        Viewing 3 posts - 61 through 63 (of 63 total)