Power Rail Issues in OSD335x-C-SIP

[Rick Dall]

After having a problem with intermittent boot failure, I realized that there is a recommendation to place a capacitor of ~50uF from SYS_VOUT to ground.

After applying 47uF, I found that boot failure could still occur and increased the value to 330uF, so far the fault has not recurred.  Observed SYS-VOUT with an oscilloscope and observed a glitch of ~-2V with duration ~10ms. Observed that application of capacitor does not much reduce the dip, even at 330uF.

*** I’m wondering if the 50uf on SYS_VOUT is an adequate measure for clean power? ***

Also I’ve observed:

– VDD_DDR is 1.5V (expected) when running normally, under the fault condition it jumps from 1.5V to 2.776V _during_ the SYS_VOUT glitch (CRO screenshot Attached)

– VDD_MPU is 1.319V, expected value is 1.1V (when running normally or in fault condition)

– Date code of affected modules is 2307

– Previous designs using datecodes 2239 and 2104 have _not_ shown this fault despite _not_ having recommended SYS_VOUT capacitor.

*** Do we have any thoughts why VDD_MPU is 1.319V not 1.1V as indicated in the specifications ? ***

Attachments:

1. 

   SYSVOUTStartupGlitch_VDDSDDRSetPointShift_4062-scaled.jpg
   

[Neeraj Dantu]

Rick,

SYS_VOUT is responsible for powering the regulators and LDOs of the PMIC. Take a look at https://octavosystems.com/app_notes/osd335x-c-sip-power-application-note/ for the internal power configuration. The 50uF capacitor helps SYS_VOUT support the input to the rails of the the PMIC.

Regarding the behavior you are seeing, here are a few questions:

1. How many boards does this occur on?

2. From the picture you posted, it looks like SYS_VOUT is at 4V and not at 5?

3. Can you map the input voltage as well? The theory is that the power rail that is supplying power to the SiP is unable to support the in-rush. In-rush specifications are also provided in the power application note linked above.

We have not seen this behavior before, but the power glitch is probably responsible for inaccurate output voltages of the PMIC. Note that these voltages are out of spec for the internal sub-systems and could damage the devices they are powering.

Best,

Neeraj

[Rick Dall]

Thanks Neeraj.

Re. your questions,

1. We’ve found a newly manufactured batch of boards for which ~ 40% intermittently fail to boot. I’ve examined some non failing samples and find a similar glitch on SYS_VOUT but not such that the boot failure occurs. Boot failures seem to be confined to modules with date code 2307. Other date  codes in use are 2239 and 2104.

2. Device is being supplied via input VIN_BAT directly from a Li-Ion cell in range 3.3 to 4.2VDC.

3. I have looked for glitches on the input side (VIN_BAT) but found none

Will continue to study the problem along with the notes you’ve suggested.

 

 

[Neeraj Dantu]

Rick,

Please check whether good boards from other lots also have this glitch. This may be systemic as VIN for Bucks and LDOs inside TPS65217C need >2.7V input to function. Please see Table in Section 7.5 of the datasheet(https://www.ti.com/lit/ds/symlink/tps65217.pdf) for details. The power rails failing like described could be explained if SYS_VOUT behaves as shown in the scope shot.

Please also check battery capacity for in-rush. I suggest additional testing with robust power supply to the input.

Note that SYS_VOUT is connected to VBAT input via a FET(see Figure 11 in the datasheet), so SYS_VOUT should be = to VBAT. The “POWER PATH INPUT CURRENT LIMITS” section in the datasheet also lists the VBAT load current as 2A. If you have access to it, I would also suggest testing with VIN_USB which has a much better 500mA current limit.

Best,

Neeraj

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