Reply To: SYS_VDD2_3P3V / SYS_VDD3_3P3V pin assignment
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For SYS_VDD3_3P3V, we purposefully spec’d a lower output current than LDO4 can supply due to the fact that it will primarily be used to supply current for the VDDSHVx pins. The 50mA is what can be used externally when the rail is supplying all of the I/O voltage pins. If you plan to use 1.8V I/O and instead supply the VDDSHVx pins using SYS_VDD_1P8V, then you can increase the external current supplied by SYS_VDD3_3P3V. However, that rail is used internally for I/O voltages that must be 3.3V so that maximum draw can only be up to 350mA given that all the VDDSHVx pins are supplied using SYS_VDD_1P8V.
The reason that there are a lot more balls for SYS_VDD3_3P3V is to make connecting the VDDSHVx pins easy. See section 3.7 of the Layout Guide for more information.
For SYS_VDD2_3P3V, that is a typo. In our testing, that rail has margin to supply 150mA but the datasheet should read 100mA. Thanks for catching that.