Device tree changes for dual Ethernet port usage

Currently chasing down problems with the Ethernet ports on a custom board. One of the issues may be because I’ve got 2x Ethernet ports allocated but not necessarily the correct device tree setup for them.

I’ve followed the steps given in your application note (https://octavosystems.com/app_notes/ethernet-am335x-system-in-package/), with regards the phy-ID’s etc. However, something which isn’t clear is the allocation of the 2nd Ethernet device, given the mac{} statement only assigns the 1st set of pins, leaving the 2nd unconnected/unassigned (I’m referencing osd335x-sm.dtsi)

It’s a really stupid point, but I’m stumped on where to allocate the 2nd port! Code so far is below, any ideas?

thanks
Mat

——————-

&cpsw_emac0
{
phy_id = <&davinci_mdio>, <0>;
phy-mode = “mii”;
};

&cpsw_emac1
{
phy_id = <&davinci_mdio>, <1>;
phy-mode = “mii”;
};

&mac
{
slaves = <1>;
pinctrl-names = “default”;
pinctrl-0 = <&mii1_pins_default>;
status = “okay”;
};

&davinci_mdio
{
pinctrl-names = “default”;
pinctrl-0 = <&mymdio1_pins_default>;
status = “okay”;
};

mii1_pins_default: mii1_pins_default
{
pinctrl-single,pins = <
AM33XX_IOPAD(0x108, PIN_INPUT | MUX_MODE0) /* (H16) gmii1_col.gmii1_col */
AM33XX_IOPAD(0x10c, PIN_INPUT | MUX_MODE0) /* (H17) gmii1_crs.gmii1_crs */
AM33XX_IOPAD(0x110, PIN_INPUT | MUX_MODE0) /* (J15) gmii1_rxer.gmii1_rxer */
AM33XX_IOPAD(0x114, PIN_OUTPUT | MUX_MODE0) /* (J16) gmii1_txen.gmii1_txen */
AM33XX_IOPAD(0x118, PIN_INPUT | MUX_MODE0) /* (J17) gmii1_rxdv.gmii1_rxdv */
AM33XX_IOPAD(0x12c, PIN_INPUT | MUX_MODE0) /* (K18) gmii1_txclk.gmii1_txclk */
AM33XX_IOPAD(0x130, PIN_INPUT | MUX_MODE0) /* (L18) gmii1_rxclk.gmii1_rxclk */
AM33XX_IOPAD(0x128, PIN_OUTPUT | MUX_MODE0) /* (K17) gmii1_txd0.gmii1_txd0 */
AM33XX_IOPAD(0x124, PIN_OUTPUT | MUX_MODE0) /* (K16) gmii1_txd1.gmii1_txd1 */
AM33XX_IOPAD(0x120, PIN_OUTPUT | MUX_MODE0) /* (K15) gmii1_txd2.gmii1_txd2 */
AM33XX_IOPAD(0x11c, PIN_OUTPUT | MUX_MODE0) /* (J18) gmii1_txd3.gmii1_txd3 */
AM33XX_IOPAD(0x140, PIN_INPUT | MUX_MODE0) /* (M16) gmii1_rxd0.gmii1_rxd0 */
AM33XX_IOPAD(0x13c, PIN_INPUT | MUX_MODE0) /* (L15) gmii1_rxd1.gmii1_rxd1 */
AM33XX_IOPAD(0x138, PIN_INPUT | MUX_MODE0) /* (L16) gmii1_rxd2.gmii1_rxd2 */
AM33XX_IOPAD(0x134, PIN_INPUT | MUX_MODE0) /* (L17) gmii1_rxd3.gmii1_rxd3 */
>;
};

mii2_pins_default: mii2_pins_default
{
pinctrl-single,pins = <
AM33XX_IOPAD(0x78, PIN_INPUT | MUX_MODE1) /* (U18) gpmc_be1n.gmii2_col */
AM33XX_IOPAD(0x70, PIN_INPUT | MUX_MODE1) /* (T17) gpmc_wait0.gmii2_crs */
AM33XX_IOPAD(0x74, PIN_INPUT | MUX_MODE1) /* (U17) gpmc_wpn.gmii2_rxer */
AM33XX_IOPAD(0x40, PIN_OUTPUT | MUX_MODE1) /* (R13) gpmc_a0.gmii2_txen */
AM33XX_IOPAD(0x44, PIN_INPUT | MUX_MODE1) /* (V14) gpmc_a1.gmii2_rxdv */
AM33XX_IOPAD(0x58, PIN_INPUT | MUX_MODE1) /* (U15) gpmc_a6.gmii2_txclk */
AM33XX_IOPAD(0x5c, PIN_INPUT | MUX_MODE1) /* (T15) gpmc_a7.gmii2_rxclk */
AM33XX_IOPAD(0x54, PIN_OUTPUT | MUX_MODE1) /* (V15) gpmc_a5.gmii2_txd0 */
AM33XX_IOPAD(0x50, PIN_OUTPUT | MUX_MODE1) /* (R14) gpmc_a4.gmii2_txd1 */
AM33XX_IOPAD(0x4c, PIN_OUTPUT | MUX_MODE1) /* (T14) gpmc_a3.gmii2_txd2 */
AM33XX_IOPAD(0x48, PIN_OUTPUT | MUX_MODE1) /* (U14) gpmc_a2.gmii2_txd3 */
AM33XX_IOPAD(0x6c, PIN_INPUT | MUX_MODE1) /* (V17) gpmc_a11.gmii2_rxd0 */
AM33XX_IOPAD(0x68, PIN_INPUT | MUX_MODE1) /* (T16) gpmc_a10.gmii2_rxd1 */
AM33XX_IOPAD(0x64, PIN_INPUT | MUX_MODE1) /* (U16) gpmc_a9.gmii2_rxd2 */
AM33XX_IOPAD(0x60, PIN_INPUT | MUX_MODE1) /* (V16) gpmc_a8.gmii2_rxd3 */
>;
};