SPI Clock issue

Viewing 6 reply threads
  • Author
    Posts
    • #12210
      Ashvin RamaniAshvin Ramani
      Participant

        We are using OSD32MP1-BRK and we want to use SPI1 on the M4 side, following the procedure we have made to enable it.

        1)Generated source code and device tree using STM32CubeMX.
        2)Applied device tree changes on A7 side generated by STM32CubeMX.
        3)Compiling image and loading on to OSD32MP1-BRK.
        4)Doing SPI communication and monitoring SPI CLK line with PicoScope.

        NOTE: Using PZ0 alternate ping for SPI after disabling from A7 which was default used for SPI6.

        Observation:
        1)CLK: Looks like the clock is generated but the voltage level is around 40mv.

        DO not understand why clock is not generated as expected. Can you please help here to do successful communication with SPI1.

      • #12212
        coloradocarlos
        Participant

          Is the same behavior observed on the SPI CLK pin(s) for an unmodified version of the SD card image from Octavo? Which version of the kernel (SD card image) are you using? On the A7 side, is the “SPI communications” you are using the Linux spidev driver?

        • #12220
          Neeraj Dantu
          Moderator

            Ashvin,

            Agree with Carlos. In addition, make sure there is no device on the CLK pin when you are trying to verify the function to eliminate any external pull on the pin from a bad sink.

            If you continue to face issues, I recommend the following steps to debug this:

            1. Verify that you can exercise the SPI interface you intend to use in Engineering Mode via JTAG. Please see https://octavosystems.com/forums/topic/getting-started-with-osd32mp1-brk-st-link-jtag-interface/

            2. Verify pinctrl. See example device tree here: https://github.com/STMicroelectronics/linux/blob/v5.10-stm32mp/arch/arm/boot/dts/stm32mp15-m4-srm.dtsi and https://github.com/STMicroelectronics/linux/blob/v5.10-stm32mp/arch/arm/boot/dts/stm32mp15-m4-srm-pinctrl.dtsi#L432

            3. verify Clock tree to make sure that the SPI peripheral you are trying to operate is getting good clock: https://wiki.st.com/stm32mpu/wiki/STM32MP15_clock_tree

            Some resources that you can refer to:

            1. https://wiki.st.com/stm32mpu/wiki/How_to_assign_an_internal_peripheral_to_a_runtime_context

            2. https://wiki.st.com/stm32mpu/wiki/How_to_configure_system_resources

            3. https://wiki.st.com/stm32mpu/wiki/STM32CubeMP1_development_guidelines

            Best,
            Neeraj

          • #12278
            coloradocarlos
            Participant

              Ashvin,

              I am having technical trouble viewing your recent correspondence.

              You asked about SPI code running on the MCU. Try running one or more of these demos for the DK2. With slight modification, they run on the Octavo line of SIP’s:

              https://github.com/STMicroelectronics/STM32CubeMP1/tree/master/Projects/STM32MP157C-DK2/Examples/SPI

              Also the PZ0, etc. pins are secure pins defined in pinctrl_z. You may need to review the secure bootloader DTS configuration in TF-A or OP-TEE. I worry you may be having problems due to the security mechanism. Try the unsecure pins and see if you have the same problems.

              Regards, Carlos

            • #12221
              Ashvin RamaniAshvin Ramani
              Participant

                @coloradocarlos & @Neeraj, Thank you for the input.

                Let me summarize again from the beginning, what we are doing and what we are expecting to achieve. I am describing my approach as below:
                ***************************************************************************************************************************
                What we did:
                1) We are using the OSD32MP1-BRK board (No other board is connected for this exercise, lines are open!)
                2) We are using OpenSTLinux(kernel:), and we have applied this patch( https://github.com/octavosystems/BRK_Developer_Package_patches)to add support for OSD32MP1-BRK in the OpenSTLinux.

                What we would like to achieve:
                1) Want to use SPI1 interface on M4 (alongside RTOS support) and want to use PZ0, PZ1, PZ2, PZ3 Pins only (due to design limitations!)

                Could you please guide me from here to enable the SPI1 on the M4 side?
                ***************************************************************************************************************************

                ***************************************************************************************************************************
                Following is my observation after going through the default device tree which is provided as part of the developer package in point-2 from what we did section above, which is also available at https://github.com/octavosystems/OSD32MP1-BRK-device-tree.

                1)PZ0, PZ1, PZ2, PZ3 pins are occupied by A7 for SPI6,: Is it possible to redirect them to the M4 side for SPI1? BUT don’t know how!!
                1)SPI1 doesn’t seems to be enabled but SPI2/4/5 interfaces seems enabled.
                3)Clock Source Configuration: HSI for SPI4/5 and HSE for SPI1/SPI2, Does OSD32MP1-BRK contain an External oscillator?, because I am not able to configure HSE source clock for SPI1/2 in STM32CubeMX/IDE.

                ***************************************************************************************************************************

                We want to use only a production mode not an engineering one.

                Let me know if you need any other information/clarification.

                Thank you in advance and hoping a useful response!!

                BR,
                Ashvin

              • #12298
                Ashvin RamaniAshvin Ramani
                Participant

                  @coloradocarlos & @Neeraj, I missed the kernel version in my previous reply. It is 5.4

                • #12305
                  Neeraj Dantu
                  Moderator

                    Ashvin,

                    Unfortunately, you cannot assign SPI6 to the M4 core, but SPI1/2/3/4/5 are available to be assigned to the M4. You can see the options for assignment in CubeMX tool on the left hand side of the Pinout and Configuration tab of CubeMX. The SPI peripherals are listed in the category “Connectivity”

                    A good way to understand the device tree changes you need to add an SPI interface and assign it to the M4 core is by using the Minimcal CubeMX project in the application note: https://octavosystems.com/app_notes/stm32mp1-cubemx-tutorial-for-osd32mp15x/

                    1. Download the Minimal CubeMX project linked in the above app note.

                    2. Generate code with the default settings and store the generated device trees in a folder

                    3. Modify the project to add SPI interface and assign it to the M4 core in the Pinout & Configuration tab of CubeMX

                    4. Generate new code and store it in a different folder

                    5. Compare the device trees generated for TF-A, U-Boot and Kernel. You will see new pinmuxing, clocking and m4_spi related entries in the newly generated device trees. CubeMX also generates the initialization code for the SPI interface on M4. So, you can open the M4 project in Cube IDE and start developing your code.

                    On Clock source, the minimal CubeMX project file has HSE enabled for BRK by default(OSD32MP1 has an oscillator integrated for HSE). You can select the clock source for SPI peripheral in the Clock Configuration tab of the CuebMX project.

                    Please review the links in https://octavosystems.com/forums/topic/spi-clock-issue/#post-12220 for more detailed information about how peripherals are assigned to M4 and their development.

                    Best,
                    Neeraj

                Viewing 6 reply threads
                • You must be logged in to reply to this topic.