TI is a key supplier to Octavo. We have a very strong partnership but there are no financial ties between us.
No, it won’t. We specifically designed our products to have a wide 1.27 mm ball pitch allowing the use of low cost manufacturing options.
We plan to support this device as long as TI continues to support the AM335x device. In fact, we will most likely be able to support it longer than TI will.
One is broken into 20 sub blocks with each block showing one of the 20 columns of the OSD335x. The other is broken into 12 sub blocks, each grouping signals according to functionalities that the OSD335x provides. So, you can use which ever one fits your needs. Both are linked below.
An Eagle Schematic library containing an Eagle CAD symbol of OSD3358 is also available for download and can be found here.
The following table shows the minimum set of signals that need to be connected to use OSD335x. It also shows internal pull up resistor values, the voltage rail they are pulled up to and the specific pad that was pulled up.
|OSD335x Pad Name||PAD||OSD335x PAD Name||PAD||Pull Up Resistor Value||Pull Up Voltage||Pull Up on PAD|
These power pins are driven by the TPS65217C PMIC and are used internally to power the AM335x, DDR and other components. These pins are all connected within the SiP and do not be connected externally. Optionally, these pins can be brought out as test points for debugging purposes only. They should NEVER be used to power external components.
The OSD335x supports all the frequencies supported by corresponding AM335x present inside. For example, the AM3358 inside the OSD3358 supports 6 Operational Performance Points(OPP). It can run at 300MHz, 600MHz, 720MHz, 800Mhz and 1GHz. These operational performance points are set using the Digital Phase Locked Loops(DPLLs) and MPU, CORE voltages on the AM335x. The following figure from the AM335x datasheet (Table 5-7) shows the OPPs, the corresponding MPU voltage to be set and the frequency of operation of the OPP (Source: AM335x datasheet).
|VDD_MPU OPP||VDD_MPU||ARM Clock Speed|
|Nitro||1.272 V||1.325 V||1.378 V||1 GHz|
|Turbo||1.210 V||1.260 V||1.326 V||800 MHz|
|OPP120||1.152 V||1.200 V||1.248 V||720 MHz|
|OPP100||1.056 V||1.100 V||1.144 V||600 MHz|
|OPP50||0.912 V||0.950 V||0.988 V||300 MHz|
Pin map of OSD335x corresponds to the pin map of the ZCZ package of the AM335x.
The ball map of the OSD335x was designed to match the ball map of AM335x ZCZ package except for a few changes. The following figure highlights the changes that were made to AM335x ZCZ ball map.
Violet and Grey pins are the only pins that have been moved or functionally changed.
Blue pins (AM335x DDR interface) should be left unconnected.
Green pins (AM335x Power input pins) should be left unconnected or brought out as test points for monitoring.
Orange pins are additional pins added to the package for more functions.
Please refer to the datasheet for their functional description.
The major changes in functionality are listed below. (more…)
All the peripherals supported by the AM335x are also supported by the OSD335x. However, the OSD335x only supports 3.3V I/Os. Please refer to question ‘What are the differences in ball maps of AM335x and OSD335x?‘ for ball map differences between OSD335x and AM335x.
No, you don’t. The AM335x die in the OSD335x is the same as the Die in the discrete TI device. This means that the Pin Mux will work the same on the OSD335x as it would on the discrete version. There are minor differences in location and position of a few signals. Please refer to question ‘What are the differences in ball maps of AM335x and OSD335x?‘ for ball map differences between OSD335x and AM335x.
Yes, the OSD335x supports all of the functions of AM335x that is inside the OSD335x.
The AM3358 supports PRUs therefor the OSD3358 supports PRUs. The AM3352 does not support PRUs so the OSD3352 does not support PRUs.
The AM335x inside of the OSD335x can directly drive LCD panels. Here is an overview pulled from the AM335x datasheet on TI.com
(Source: AM335x datasheet)
The BAS version of the device does not support this functionality. We are planning to make it available in future revisions.
Power consumption of OSD335x depends highly on usage scenarios. Some helpful resources are:
There are 3 use case scenarios for RTC functionality. They are the RTC-only mode which allows all the power supplies except for the RTC to be turned off to save power, RTC timer functionality mode in which the Real Time clocking features are used and RTC disabled mode in which RTC features are not used. Use of RTC requires both software and hardware setups. The hardware requirements of various RTC configurations are shown below and described in detail in the AM335x schematic checklist. Note that RTC-only mode is not supported by the OSD335x because of the version of the PMIC used to power AM335x.
|Pin||Function||RTC-only mode||RTC timer functionality but no RTC-only mode||RTC feature desabled|
|VDDS_RTC||1.8 V power supply||Always on RTC 1.8 V power supply||any AM335x 1.8 V power supply||any AM335x 1.8 V power supply|
|CAP_VDD_RTC||RTC core voltage input/LDO output||1uF decoupling capacitor to VSS||VDD_CORE||VDD_CORE|
|RTC_KALDO_ENn||Internal LDO enable input||VSS||VDDS_RTC||VDDS_RTC|
|RTC_PWRONRSTn||RTC power on reset input||1.8 V RTC power on reset||1.8 V PWRONRSTn||VSS|
|PMIC_POWER_EN||PMIC power enable output||PMIC power enable input||No Connect||No Connect|
|EXT_WAKEUP||External wakeup input||1.8 V wakeup event signal||VSS||VSS|
The following steps describe the software procedure to enable use of an external 32Khz oscillator for RTC clock input.
Begin with writing the KICK registers to disable write protect to RTC registers.
RTC_OSC_REG (0x44E3E054) register needs to be modified to enable external oscillator clock input. Set RTC_OSC_REG to 1 to select external 32KHz oscillator as clock source and RTC_OSC_REG to enable clock mux of RTC. Note that 0 at RTC_OSC_REG enables the use of internal feedback resistor instead of an external one.
The procedure can be verified by either probing the output of the 32KHz (OSC1) oscillator or probing the XDMA_EVENT_INTR1 signal selecting OSC1 as its clock source.