[Simon Acker]

Resolved. We had the Octavo connected to an ethernet switch via an RGMII connection. The ethernet switch remained powered when the Octavo was off. The powered ethernet switch continued to provide a clock waveform via the RX_CLK signal of the RGMII connection. This clock waveform was causing the bump discussed previously. It was also causing SYS_VDD3_3V3 and SYS_VDD1_3V3 to read non-zero voltages (1V & 0.5V, respectively) when the PMIC was off.

Thanks for your help Neeraj!

[Simon Acker]

Hi Neeraj,

Upon further investigation of the controlled power down behavior, we are seeing a bump in the power down waveform for SYS_VDD3_3P3V. I’ve attached a scope capture. We’ve powered VDDSHV 1 & 3-6 with SYS_VDD3_3P3V, so SYS_VDD3_3P3V is labelled VDDSHV_3V3 in the scope capture below. In addition to the VDDSHV connections, SYS_VDD3_3P3V is also connected to a clamping circuit identical to the reference design for the C-SIP and an analog pin (to measure its voltage).

As I understand it, the VDDSHV voltages can be used as the pull-up for various GPIO pins. A similar bump is visible on a couple of inputs where the external driver (pull-up) was removed. I’ve attached a scope capture of one (OCT_EMMC_PG) below. I was able to suppress the bump with a 510 ohm resistor but not with a weaker one. These two factors indicate to me that this bump is driven.

Have you seen this behavior before? Is it concerning? Will it damage the device?

Thanks,

Simon

Attachments:

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   Picture1.png
   

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   MicrosoftTeams-image.png
   

[Simon Acker]

Resolved. I was causing a sudden power off. These issues go away when the “poweroff” command is used. This command uses the processor’s RTC to cause PMIC_PWR_EN to go low after a brief delay. Pulling PMIC_PWR_EN low is the proper power down sequence.

[Simon Acker]

Here are those scope captures. I tried the file attachment rather than copy paste. Hopefully that works better.

Attachments:

1. 

   Scope-Capture-1.png
   

2. 

   Scope-Capture-2.png
   

3. 

   Scope-Capture-3.png
   

[Simon Acker]

Hi Neeraj,

I just confirmed that registers 0x19-0x1E match the reset values for the ‘C’ version of the PMIC.

Best,

Simon

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