[sh9]

Neeraj,

thanks for your detailed reply.

Regarding my recommendation for a better clamping circuit, I don’t have a tried and tested design, but I can offer two starting points for designs you’d need to verify if they suit your requirements.

The simplest solution would apply if the clamping current doesn’t exceed 80 mA. You wrote that the currents involved should be small, so the chance of the simple circuit being adequate should be good. The circuit would use the TLVH431 to sink the current, i.e. there’s no transistor Q1, and the 500 Ohm resistor R43 is replaced by a piece of wire. This is the simple adjustable shunt voltage reference circuit. It clamps hard, so for a better margin I would choose a clamping voltage somewhat higher than 1.55 V, say 1.8 V, by adjusting the values of R40 and R41.

If a circuit is needed that can sink more current than 80 mA, one may want to look into using a part like the LT6650, which is a reference plus an amplifier. It is similar to the TLVH431, but has separate pins for input and output voltage, so it can drive the output lower to accomodate an external transistor like the 2N2907A. I trust the reader to be able to come up with a modified schematic. I’m unaware of a similar part in TI’s portfolio, but there might be one.

Regarding the questionable clamping circuit originating with TI, you may want to relate my findings back to them, so they can have a look at their application note, and perhaps come up with a new revision.

Cheers

Stefan

 

[sh9]

I have built the clamping circuit, with the small change of replacing the TLVH431 with the LMV431, because I only hat the latter at hand. They should behave very similarly. The other parts are as shown in the tutorial document.

I put the thing into my trusty old curve tracer, and plotted the I/V curve, similarly to what you would do with a diode. I have attached a snapshot made with my smartphone. You can see the display settings at the right, i.e. the horizontal scale goes up to 2 V, and the vertical scale up to 20 mA.

As you see, it doesn’t take much current to get beyond 2 V, which occurs at around 20 mA. The LMV431 can only sink 30 mA, but if the object was to keep the voltage below 2 V, this would have been enough, i.e. the transistor could have been omitted.

Note the kink at around 1.55 V, which shows that the clamping action does indeed start at the right voltage. At that point, there’s practically no current through the transistor, the little current you see is through the 500 Ohm resistor. An ideal clamp would produce a line that is very close to vertical. Instead you get a curve, which from there on is similar to a diode curve. That is because of what I described above. The result is a very poor clamping circuit.

Attachments:

1. 

   Clamping-circuit.jpg
   

[sh9]

Neeraj,

Your description is a “digital” view of the circuit, which is only valid as long as the circuit conditions permit it. I posit that this is not the appropriate way to describe the operation of the circuit. For example, Q1 is not “ON” or “OFF” in this sense. Sure, it can be off, but when it is on, it operates within its “linear” region, not in the saturated region. It can’t be regarded as a switch.

The TLVH431 likewise is working in a linear fashion, and can’t be regarded as a switch. While “ON”, if you want to call it that, it conducts current from cathode to anode, but it is unable to pull the cathode voltage lower than the voltage at the reference pin.

So my point is, you are oversimplifying if you view the circuit in terns of switches being on or off. It is essentially a linear circuit, which can only be described correctly when operating limits and characteristics are being taken into account.

To put some detail to this. You write:

“The reference voltage input to TLVH431 is established by the voltage divider comprised of R40 and R41. The voltage divider makes it such that if the voltage difference between VDDSHV_3P3V and SYS_RTC_1P8V is > 1.55V, the reference voltage threshold of TLVH431 of 1.24V is met at it’s VREF input(Node A).”

This is entirely correct.

“This changes voltage at node B(base of Q1) turning transistor ON/OFF based on TLVH431 turning ON/OFF.”

This is the problematic part. Neither Q1 nor the TLVH431 simply go from OFF to ON at this point. Rather, it is an amplifier in a feedback loop. Its operation is like this: The TLVH431 starts to sink current from its cathode to its anode, and part of this current flows through the base of Q1 (R43 takes the other part, but that’s not important for now). Q1 being a current amplifier, an amplified current thus flows from emitter to collector, which is the clamping action that we want. As a result of this, relying on the input impedance of the source we want clamped, the circuit regulates the current through Q1 such that the voltage at the reference pin of the TLVH431 stays at 1.24 V. However, for this to work, both TLVH431 and Q1 need to operate within the linear range of their operating conditions. The TLVH431 needs at least 1.24 V between cathode and anode. A silicon transistor needs about 600-700 mV between emitter and base. Those two voltages are in series with respect to the source that we want to clamp, so the circuit isn’t working in its linear range when we set the clamping voltage to 1.55 V, because that’s not enough for providing the sum of 1.24 and 0.65 V.

The result is that the circuit may appear to work, but its clamping characteristic will be weak, because the available gain is very low. You will find that depending on the source inpedance, the resulting clamping voltage would be significantly higher than 1.55V, i.e. the circuit’s own impedance is quite high for something that is supposed to clamp.

Note that a simulation might not tell you the true story here, depending on the accuracy of the TLVH431 model in conditions outside the recommended operating conditions.

A correctly dimensioned circuit would keep the operating conditions of the TLVH431 within the recommended range, even during clamping action. This means that there would have to be at least 1.24 between cathode and anode in this situation. If a simulator shows a lower voltage, the result should be viewed with suspicion.

[sh9]

Sorry for the delay in replying, I had a couple of days off due to holidays.

I went through the schematic design checklist document, and these are the deviations from it:

• PMIC connections are as in Figure 1 (RTC subsystem enabled), even though the RTC is not intended to be used. However, CAP_VDD_RTC and RTC_KALDO_ENN are connected as in Figure 2.
• No clamping circuit is used.
• The BAT pins are connected with each other, but are otherwise floating. BAT_SENSE is also unconnected (i.e. not connected to BAT).
• WARMRSTN is undriven. It is not used to reset external devices. It merely connects to the JTAG connector.

Regarding the clamping circuit, I have my reservations which I open another issue for.

Some crucial signals have, unfortunately, not been brought out from underneath the package to test points, so my opportunities to measure their voltage are quite limited. I basically can manage to probe balls on the outermost row.

I am not sure how my “mixing” of Figure 1 and Figure 2 connections impacts powerup. I find the PMIC data sheet difficult to understand in this respect.

Another suspicion of mine is that not connecting BAT_SENSE to BAT might disturb SYS_VOUT switching, but unfortunately I have no access to SYS_VOUT, because it hasn’t been brought out to a test point.

It doesn’t seem as if anything was shorted signals or badly orientated parts. I don’t know if the soldering profile or part handling was correct, I would have to investigate that if necessary. I have two boards, both show the same behavior.

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