[Dman]

Hi Neeraj

I am the hardware engineer who designed the circuits and PCB for this project. Our design has EEPROM_WP connected to LCD_DATA_4 as it was in the design that was validated by Martin at Octavo. Problem with this is we knew LCD_DATA_4 had to be tied high for the correct boot order which it is via a 100K resistor, we did not know the EEPROM_WP needed to be tied low during the boot process. We already have the boards and these are directly connected together on an internal PCB layer so disconnecting them is not a viable option, what you do you suggest as a sensible solution?

[Author]

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