[Antonio Garcia Oteros]

I’m currently designing a custom PCB using the OSD3358-SM SiP, and I’m closely following the schematic and layout of the OSD3358-SM-RED development board as reference.

While reviewing the layout—specifically the routing between the OSD335x-SM and the eMMC—I noticed that the control and data lines (DATx, CMD, CLK) do not appear to be length-matched according to standard high-speed design practices (e.g., within ±0.5?mm).

I’m aware that eMMC communication at High Speed (52?MHz) or higher typically requires equal trace lengths for reliable signal integrity, especially between CLK, CMD, and the DATx lines.

So I have two questions:

Should I trust the layout of the RED board, even though it doesn’t seem to apply length matching for eMMC lines?

Or, should I define a length-matching rule in Altium and apply tuning to all eMMC nets in my custom layout?

Any advice on whether the RED board layout has been tested/validated with relaxed length matching for eMMC would be greatly appreciated. I want to make sure my design is robust and follows best practices.

Thanks in advance!

Best regards,

[Antonio Garcia Oteros]

Thanks

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