Hi Neeraj,
Thank you for this feedback. My boss, Joe, may be chiming in on this thread with additional details as he has been working on the programming side of this project, I have been doing the hardware mostly. He attempted your suggestions and got the attached log file and his report on what he found:
“Attached is the log file of booting from an SDcard and flashing the eMMC. I did not see any obvious errors.. Once the flashing was complete, I booted from the SDcard, mounted the eMMC (/dev/mmcblk1p1) and saw that it did flash the MMC correctly. I made sure the patched SPL/U-boot was in the /opt/backup/uboot directory before flashing. I removed the LCD and the SDcard and tried booting from the eMMC but only got “CCCC” on the UART. I booted from the SDcard again and redid the dd commands to copy the SPL/U-boot images to the eMMC (/dev/mmcblk1). Removed the SDcard and still only get “CCCC” on the UART. I assume I am getting the SPL/U-boot images patched correctly or else I would not be able to boot from the SDcard. Is there a way to confirm what images are on the eMMC? Other ideas?”
Hi Neeraj,
Great thank you we will try this, we don’t have anything other than the LCD on those lines, and we don’t try to talk to the screen until well into the boot process so I am hopefuly that’s not what we are seeing but I can try and probe them.
Is there a message in particular that we should be looking for after mounting the eMMC contents to ensure the SPL and U-boot are flashed correctly?
Thanks,
Adam
Hi Neeraj,
We’ve checked the boot configuration a number of times, it matches what we have been using with the Beaglebone black, I’ve attached an image of the boot section in case you see something we’ve missed. On the “C” version of this IC, is the eMMC CLK line routed out? I have probed the MMC clock line to the SD card, and we can observe it operating as expected.
Based on our investigation, it appears that the SPL is not being read out of RAM correctly, we do not get the “U-BOOT SPL 2018.01…” message that we expect. Is there some reason the eMMC would be having problems loading the SPL into RAM to execute out?
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