Unable access SPI NOR flash in Linux user space

Forums Reference, Evaluation, and Development Boards OSD3358-SM-RED Unable access SPI NOR flash in Linux user space

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    • #13869
      JudyJudy
      Participant

        Hi,

        I have a OSD3358-SM-RED dev kit and I am trying to use SPI NOR flash S25FL127S for bootup.I tried to access it on /dev/spidevx.x following this guide, https://www.infineon.com/dgdl/Infineon-AN233637_Accessing_SPI_NOR_flash_registers_in_Linux_user_space-ApplicationNotes-v01_00-EN.pdf?fileId=8ac78c8c7ddc01d7017ddd028cbe5917, but I can’t query any device ID or registers. I am using recent debian image from https://www.beagleboard.org/distros, and I can see /dev/spidev0.0, 0.1, 1.0, 1.1. Can you let me know how to modify it to be able to access SPI NOR flash? I have made sure J11 is populated, and I can use SD card to boot up the device.

         

        Thanks,

      • #13873
        Neeraj Kumar Reddy DantuNeeraj Dantu
        Moderator

          Judy,

          You will need to change the device tree in order to enable the SPI flash functionality. https://github.com/RobertCNelson/dtb-rebuilder provides a good way to do custom device trees. SM-RED’s device tree can be found here: https://github.com/octavosystems/OSD335x-Device-Tree/tree/master.

          Please take a look at https://software-dl.ti.com/processor-sdk-linux/esd/docs/latest/linux/Foundational_Components/Kernel/Kernel_Drivers/SPI.html for additional information. Example implementation from ICEV2 board: https://github.com/RobertCNelson/dtb-rebuilder/blob/4.14-ti/src/arm/am335x-icev2-common.dtsi#L233

          Best,

          Neeraj

           

          • This reply was modified 1 year, 1 month ago by Neeraj Kumar Reddy DantuNeeraj Dantu.
        • #13885
          JudyJudy
          Participant

            Hi Neeraj,

            Thank you for the reply. I also want to know how to access SPI NOR flash in uboot. I followed this discussion, https://octavosystems.com/forums/topic/spi-nor-from-u-boot/. I have compiled “sf” commands and also added ““CONFIG_SPI_FLASH_SPANSION=y”” in config in the uboot. When I executed “sf probe 0”, it shows the error , “Invalid bus 0 (err=-19)

            Failed to initialize SPI flash at 0:0 (error -19)”

            I tried both am335x_evm_defconfig and am335x_evm_spiboot_defconfig, but both gave me the same error. Can you let me know how to modify to access it from uboot? THank you

          • #13887
            Neeraj Kumar Reddy DantuNeeraj Dantu
            Moderator

              Judy,

              Have you looked at https://octavosystems.com/forums/topic/spi-nor-from-u-boot/#post-6713 in specific pinmux definitions that are needed?

              Please also take a look at https://e2e.ti.com/support/processors-group/processors/f/processors-forum/758423/linux-am5718-qspi-boot-fail-spi-probe-failed with the same error. While the post is for a different device all the inputs should apply to AM335x.

              Best,

              Neeraj

            • #14875
              Doug SpringerDoug Springer
              Participant

                 

                I also have the same problem in uboot. sf probe => Invalid bus 0 (err=-19).

                This is on a osd3358-sm-red board. The debian image shipped with the board has even less functionality than this built with buildroot 2024.05. We intend to use the OSD3558 in production, but we have to get past this hurdle.

                In Linux, when I load the spi-nor driver, it correctly identifies the spi-nor: spi-nor spi0.0: s25fl128s1 (16384 Kbytes)

                 

                Here are the device tree bits:

                target-module@30000 {            /* 0x48030000, ap 77 08.0 */
                compatible = “ti,sysc-omap2”, “ti,sysc”;
                reg = <0x30000 0x4>,
                <0x30110 0x4>,
                <0x30114 0x4>;
                reg-names = “rev”, “sysc”, “syss”;
                ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
                SYSC_OMAP2_SOFTRESET |
                SYSC_OMAP2_AUTOIDLE)>;
                ti,sysc-sidle = <SYSC_IDLE_FORCE>,
                <SYSC_IDLE_NO>,
                <SYSC_IDLE_SMART>;
                ti,syss-mask = <1>;
                /* Domains (P, C): per_pwrdm, l4ls_clkdm */
                clocks = <&l4ls_clkctrl AM3_L4LS_SPI0_CLKCTRL 0>;
                clock-names = “fck”;
                #address-cells = <1>;
                #size-cells = <1>;
                ranges = <0x0 0x30000 0x1000>;

                spi0: spi@0 {
                compatible = “ti,omap4-mcspi”;
                #address-cells = <1>;
                #size-cells = <0>;
                reg = <0x0 0x400>;
                interrupts = <65>;
                ti,spi-num-cs = <1>;
                dmas = <&edma 16 0
                &edma 17 0
                &edma 18 0
                &edma 19 0>;
                dma-names = “tx0”, “rx0”, “tx1”, “rx1”;
                status = “okay”;
                u-boot,dm-spl;
                pinctrl-names = “default”;
                pinctrl-0 = <&spi0_pins>;
                ti,pindir-d0-out-d1-in = <1>;
                m25p80@0 {
                compatible = “spansion,s25fl127s”, “jedec,spi-nor”;
                //                    spi-max-frequency = <108000000>;
                spi-max-frequency = <050000000>;
                /* Set SPI mode = 0 */
                spi-cpol = <0>;
                spi-cpha = <0>;
                reg = <0x0>;  // chip select number
                status = “ok”;
                };
                };
                };

                &am33xx_pinmux {

                spi0_pins: pinmux-spi0-pins {
                pinctrl-single,pins = <
                AM33XX_PADCONF(AM335X_PIN_SPI0_SCLK, PIN_INPUT_PULLUP, MUX_MODE0 ) /* spi0_sclk.gpio0_2 */
                AM33XX_PADCONF(AM335X_PIN_SPI0_CS0, PIN_OUTPUT_PULLUP, MUX_MODE0 ) /* spi0_cs0.gpio0_5 */
                AM33XX_PADCONF(AM335X_PIN_SPI0_D0, PIN_OUTPUT_PULLUP, MUX_MODE0 ) /* spi0_d0.gpio0_3 */
                AM33XX_PADCONF(AM335X_PIN_SPI0_D1, PIN_INPUT_PULLUP, MUX_MODE0 ) /* spi0_d1.gpio0_4 */

                >;
                };

                };

                And just for good measure, thrown in this hack:

                uboot-2024.01/board/ti/am335x/mux.c, at the end of void enable_board_pin_mux(void), added:

                configure_module_pin_mux(spi0_pin_mux);

                I have created one single dts combining all the bits from the various include files. I use the same dts as Linux uses, and I have the following configuration items set:

                CONFIG_CMD_SPI=y
                CONFIG_DM_SPI_FLASH=y
                CONFIG_SPI_FLASH=y
                CONFIG_SPI_FLASH_SMART_HWCAPS=y
                CONFIG_SPI_FLASH_SOFT_RESET=y
                CONFIG_SPI_FLASH_BAR=y
                CONFIG_SPI_FLASH_LOCK=y
                CONFIG_SPI_FLASH_UNLOCK_ALL=y
                CONFIG_SPI_FLASH_SPANSION=y
                CONFIG_SPI_FLASH_USE_4K_SECTORS=y
                CONFIG_SPI=y
                CONFIG_DM_SPI=y
                CONFIG_SPI_MEM=y
                CONFIG_OMAP3_SPI=y

                dm tree shows:

                simple_bus   24  [   ]   simple_bus            |   |– interconnect@48000000
                simple_bus   25  [   ]   simple_bus            |   |   |– segment@0
                simple_bus   26  [   ]   ti_sysc               |   |   |   |– target-module@22000
                simple_bus   27  [   ]   ti_sysc               |   |   |   |– target-module@24000
                simple_bus   28  [   ]   ti_sysc               |   |   |   |– target-module@2a000
                simple_bus   29  [   ]   ti_sysc               |   |   |   |– target-module@30000
                simple_bus   30  [   ]   ti_sysc               |   |   |   |– target-module@38000

                and my boot header:

                U-Boot 2024.01 (Jul 22 2024 – 13:48:28 -0600)

                CPU  : AM335X-GP rev 2.1
                Model: TI AM335x BeagleBone Black
                DRAM:  512 MiB
                Core:  160 devices, 18 uclasses, devicetree: separate
                WDT:   Started wdt@44e35000 with servicing every 1000ms (60s timeout)
                Flash: 0 Bytes
                NAND:  nand: error: Unable to find NAND settings in GPMC Configuration – quitting
                0 MiB
                MMC:   OMAP SD/MMC: 0, OMAP SD/MMC: 1
                Loading Environment from FAT… Unable to read “uboot.env” from mmc0:1…
                <ethaddr> not set. Validating first E-fuse MAC
                Net:   Updated phy address for CPSW#0, old: 0, new: 4
                eth2: ethernet@4a100000using musb-hdrc, OUT ep1out IN ep1in STATUS ep2in
                MAC de:ad:be:ef:00:01
                HOST MAC de:ad:be:ef:00:00
                RNDIS ready
                , eth3: usb_ether

                 

                 

                 

                 

              • #14890
                Eshtaartha BasuEshtaartha Basu
                Moderator

                  Doug Springer,

                  Can you please share your full DT files as attachments? This will give us all the info needed to try re-creating the issue and identifying the root cause.

                  Meanwhile, please let us know if you have already tried implementing the steps suggested by Jeremie FRANCOIS to resolve a similar problem here – https://octavosystems.com/forums/topic/spi-nor-from-u-boot/#post-6713

                   

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