Hello!
We were previously using the engineering sample of OSDZU3 and the dev kit, we were told that :
“For ES parts, QSPI boot is not supported as it is a NAND SPI that Xilinx does not support. That is why you are seeing “unrecognized JEDEC id bytes”. Production parts have QSPI that is supported in Xilinx ecosystem. Please check the datasheet for the version you need as there is a 1.8V part(-xFA) and 3.3V QSPI part(-xFB).”
Does the production version OSDZU3EG1-2G-IFA supposed to support the boot on QSPI, because I known that the eMMC boot does not work on OSDZU3EG1-2G-IFA.
Thank you for your support.
There is a typo in the response you listed. As shown in the “Product Number Information” section of the OSDZU3 Datasheet (screenshot attached) and “VCCO_PSIO_500” section of the OSDZU3 datasheet (screenshot attached):
OSDZU3EG1-2G-xFA uses NOR QSPI with 3.3V IO. QSPI is connected to the XCZU3 through Bank 500 I/O and this requires Bank 500 to use 3.3V IO. eMMC interface is also on Bank 500. So, OSDZU3EG1-2G-xFA production parts support QSPI boot and does not support eMMC boot (eMMC boot is only supported with 1.8V IO).
OSDZU3EG1-2G-xFB uses NOR QSPI with 1.8V IO. This requires Bank 500 IO to be 1.8V as well. As a result, OSDZU3EG1-2G-xFB production parts support both QSPI and eMMC boot.
Note: If you intend to use an external QSPI in addition to the QSPI integrated within the OSDZU3 SiP, please make sure to match the part number and IO voltage.
Thank for the info, it’s what I was looking for!
Our QSPI is connected to the 3.3V FPGA BANK 500, so where go to go to test if we can boot from QSPI.
“OSDZU3EG1-2G-xFA production parts support QSPI boot and does not support eMMC boot (eMMC boot is only supported with 1.8V IO).”
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