Powered by Battery Only

[wilt]

According to the datasheet for the OSD335x-SM, the power rail SYS_VDD1_3P3V (TL5209) is still enabled by the PMIC LDO4 (SYS_VDD3_3P3V) so I assume your SIP experiences the same shutdown bug, 3V3B regulator bug, as the BBB A6C when being powered/powered-down by a battery only?

Is this true and do you have any plans to remedy this in the future? Otherwise, operation on a battery only, isn’t really feasible,…

Last, this bug relies on the functionality that when the TPS65217C PMIC enters the off-state, the PMIC automatically connects SYS to battery power rather than DC or USB supply. Is there no way to override this so all power sources are disconnected when the PMIC is instructed to power-off?

Regards,

[Neeraj Dantu]

Wilt,

Yes, OSD335x and oSD335x-SM suffer from the same 3V3B regulator bug when using battery. We have no plans to remedy this in the current devices, but have more devices in development that do. Please contact Octavo Sales for more information.

Unfortunately the power switching functionality is internal to the PMIC. But, you can use an external power controller like an MSP430FR2000(http://www.ti.com/product/MSP430FR2000) to achieve the functionality you mentioned.

[marton]

Hello,

Regarding the issue, in case of OSD335x-SM, if we use 1.8V for all I/O, disable LDO4, which in turn will disable TL5209 (SYS_VDD1_3P3V), would we encounter the same bug? In this case there would be no current leakage between the I/O pins and SYS_VDD1_3P3V?

Thanks,
Marton

[Neeraj Dantu]

Marton,

That is correct. For 1.8V IO, you will need to connect VDDSHVx pins to SYS_VDD_1P8V. With the IO pins powered by VDD_1P8V, there should be no leakage between SYS_VDD1_3P3V and SYS_VDD3_3P3V.

 

Note that you will have utilize level translators as necessary to communicate with peripherals that do 3.3V IO only. An external Battery management solution such as one on Beaglebone Blue: https://github.com/beagleboard/beaglebone-blue/blob/master/BeagleBone_Blue_sch.pdf could also be an option.

Best,

Neeraj

[marton]

Thanks, Neeraj!

We would only have 1.8V IO devices, so that’s not an issue. Thanks for the link to the Beaglebone Blue schematics. We’d like to stick to the PMIC’s battery charger (for 1S battery). We tested its capability with the C-SiP and it works fine.

Could you also verify that it is OK to turn off LDO4?

Thanks,
Marton

[Neeraj Dantu]

Marton,

Thanks for letting us know that it works.

The LDO4 of the PMIC is connected to the ENABLE pin of the TL5209 LDO and powers the (VDDA3P3V_USB0 + VDDA3P3V_USB1) pins of the processor. These pins power the USB PHY. Based on the Schematic Checklist(https://www.ti.com/lit/an/sprabn2a/sprabn2a.pdf), disconnecting these should not be an issue for the processor. However, the USB ports will not function in this configuration.

Best,

Neeraj

[marton]

Hi Neeraj,

Thanks for the confirmation. We won’t be using USB, so this configuration will work out great in our case.

Best,
Marton

[Author]

Posts