OSD32MP157F-512M-BAA always run at 650MHz

[fsm]

Hi,
We’re switching from OSD32MP157C-512M-BAA to OSD32MP157F-512M-BAA in our product.
With OSD32MP157C-512M-BAA, I can slow-down frequency according to opp-table but I can’t change cpu frequency ( up or down ) with OSD32MP157F-512M-BAA version
Find details bellow.
Please help us, we want the SoC OSD32MP157F-512M-BAA to run at 800MMHz
Thanks in advance
Fred

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Building our own yocto distro with
———————————–

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branch: 1.46
revision: be6ecc160ac4a8d9715257b9b955363cecc081ea
note: check bitbake version corresponding to Yocto codename on https://wiki.yoctoproject.org/wiki/Releases

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———————————–
changes made in tfa.dts & u-boot.dtsi :
———————————–

+#include “stm32mp15xf.dtsi”

+&cpu0_opp_table {
+ opp-800000000 {
+ opp-hz = /bits/ 64 <800000000>;
+ opp-microvolt = <1350000>;
+ opp-supported-hw = <0x2>;
+ };
+ opp-400000000 {
+ opp-hz = /bits/ 64 <400000000>;
+ opp-microvolt = <1200000>;
+ opp-supported-hw = <0x2>;
+ opp-suspend;
+ };
+ };

– pll1:st,pll@0 {
– compatible = “st,stm32mp1-pll”;
– reg = <0>;
– cfg = < 2 80 0 1 1 PQR(1,0,0) >;
– frac = < 0x800 >;
– };

———————————–
changes made in kernel.dts :
———————————–
+#include “stm32mp15xf.dtsi”

+&cpu0_opp_table {
+ opp-800000000 {
+ opp-hz = /bits/ 64 <800000000>;
+ opp-microvolt = <1350000>;
+ opp-supported-hw = <0x2>;
+ };
+ opp-400000000 {
+ opp-hz = /bits/ 64 <400000000>;
+ opp-microvolt = <1200000>;
+ opp-supported-hw = <0x2>;
+ opp-suspend;
+ };
+ };

———————————–
apply fragment to 5.10.61 :
———————————–

CONFIG_CPU_FREQ_GOV_PERFORMANCE=y
CONFIG_CPU_FREQ_GOV_POWERSAVE=y
CONFIG_CPU_FREQ_GOV_USERSPACE=y
CONFIG_CPU_FREQ_GOV_ONDEMAND=y
CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y
CONFIG_CPU_FREQ_GOV_SCHEDUTIL=y
CONFIG_CPUFREQ_DT=y
CONFIG_CPUFREQ_DT_PLATDEV=y
CONFIG_PM_OPP=y
CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y
CONFIG_ARM_SCMI_CPUFREQ=y

———————————–
Target behavior OSD32MP157F-512M-BAA
———————————–

I can’t change cpu-freq :
:~# cpufreq-info
cpufrequtils 008: cpufreq-info (C) Dominik Brodowski 2004-2009
Report errors and bugs to cpufreq@vger.kernel.org, please.
analyzing CPU 0:
driver: cpufreq-dt
CPUs which run at the same hardware frequency: 0 1
CPUs which need to have their frequency coordinated by software: 0 1
maximum transition latency: 69.0 us.
hardware limits: 400 MHz – 800 MHz
available frequency steps: 400 MHz, 800 MHz
available cpufreq governors: conservative, ondemand, userspace, powersave, performance, schedutil
current policy: frequency should be within 400 MHz and 800 MHz.
The governor “ondemand” may decide which speed to use
within this range.
current CPU frequency is 650 MHz (asserted by call to hardware).
cpufreq stats: 400 MHz:6.43%, 800 MHz:93.57% (14)
analyzing CPU 1:
driver: cpufreq-dt
CPUs which run at the same hardware frequency: 0 1
CPUs which need to have their frequency coordinated by software: 0 1
maximum transition latency: 69.0 us.
hardware limits: 400 MHz – 800 MHz
available frequency steps: 400 MHz, 800 MHz
available cpufreq governors: conservative, ondemand, userspace, powersave, performance, schedutil
current policy: frequency should be within 400 MHz and 800 MHz.
The governor “ondemand” may decide which speed to use
within this range.
current CPU frequency is 650 MHz (asserted by call to hardware).
cpufreq stats: 400 MHz:6.43%, 800 MHz:93.57% (14)

~# dmesg | grep -i cpu
[ 0.000000] Booting Linux on physical CPU 0x0
[ 0.000000] CPU: ARMv7 Processor [410fc075] revision 5 (ARMv7), cr=10c5387d
[ 0.000000] CPU: div instructions available: patching division code
[ 0.000000] CPU: PIPT / VIPT nonaliasing data cache, VIPT aliasing instruction cache
[ 0.000000] percpu: Embedded 20 pages/cpu s51788 r8192 d21940 u81920
[ 0.000000] pcpu-alloc: s51788 r8192 d21940 u81920 alloc=20*4096
[ 0.000000] pcpu-alloc: [0] 0 [0] 1
[ 0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=2, Nodes=1
[ 0.002804] CPU: Testing write buffer coherency: ok
[ 0.003255] /cpus/cpu@0 missing clock-frequency property
[ 0.003303] /cpus/cpu@1 missing clock-frequency property
[ 0.003324] CPU0: thread -1, cpu 0, socket 0, mpidr 80000000
[ 0.006499] smp: Bringing up secondary CPUs …
[ 0.007723] CPU1: thread -1, cpu 1, socket 0, mpidr 80000001
[ 0.007984] smp: Brought up 1 node, 2 CPUs
[ 0.008013] CPU: All CPU(s) started in SVC mode.
[ 0.043982] cpuidle: using governor menu
[ 1.845729] stm32-cpufreq stm32-cpufreq: Failed to get chip info: -517
[ 1.848889] ledtrig-cpu: registered to indicate activity on CPUs
[ 1.855152] ThumbEE CPU extension supported.
[ 2.627155] cpufreq: cpufreq_online: CPU0: Running at unlisted initial frequency: 650000 KHz, changing to: 800000 KHz

~# cat /proc/cpuinfo
processor : 0
model name : ARMv7 Processor rev 5 (v7l)
BogoMIPS : 29.53
Features : half thumb fastmult vfp edsp thumbee neon vfpv3 tls vfpv4 idiva idivt vfpd32 lpae evtstrm
CPU implementer : 0x41
CPU architecture: 7
CPU variant : 0x0
CPU part : 0xc07
CPU revision : 5

processor : 1
model name : ARMv7 Processor rev 5 (v7l)
BogoMIPS : 29.53
Features : half thumb fastmult vfp edsp thumbee neon vfpv3 tls vfpv4 idiva idivt vfpd32 lpae evtstrm
CPU implementer : 0x41
CPU architecture: 7
CPU variant : 0x0
CPU part : 0xc07
CPU revision : 5

Hardware : STM32 (Device Tree Support)
Revision : 0000
Serial : 003E00443230510232393433

above commands does nothing :
~# cpufreq-set -f 800MHz
~# cpufreq-set -c 0 -f 800MHz
~# cpufreq-set -c 1 -f 800MHz

[Neeraj Dantu]

fsm,

Your device tree fragments indicate that you are changing the opp table as well as pll settings in your TF-A, u-boot and kernel device trees. The only thing you need to do is to change the device tree include file to “stm32mp15xf.dtsi”. Please take a look at example for F version of DK2:

TF-A: https://github.com/STMicroelectronics/arm-trusted-firmware/blob/v2.4-stm32mp/fdts/stm32mp157f-dk2.dts
Kernel/u-boot: https://github.com/STMicroelectronics/linux/blob/v5.10-stm32mp/arch/arm/boot/dts/stm32mp157f-dk2.dts

Make sure you also remove “stm32mp15xc.dtsi” from all your device trees.

Best,
Neeraj

[fsm]

Neeraj,
In my tf-a.dts & u-boot.dts, i replace #include “stm32mp15xc.dtsi” by #include “stm32mp15xf.dtsi” -> no effects, running at 650MHz

Then, I replace my tf-a.dts with your stm32mp157f-dk2.dts ( no changes on u-boot.dts ) and stm32mp157f boots in 800MHz but the sdcard is not running on stm157c version.

I modify tf-a.dts to include stm32mp15xf.dtsi AND stm32mp15xc.dtsi -> I have now an image booting both stm32mp157f at 800MHz and stm32mp157c

Why did you ask me to remove “stm32mp15xc.dtsi” from all my device trees?
if this is not the right way to get the same image for both platforms, how should we do it ?

A big thank you for your help and your great reactivity.
Fred

[fsm]

U-Boot 2020.10-stm32mp-r1-CSD (Mar 02 2022 – 13:59:09 +0000)

CPU: STM32MP157F?? Rev.Z
Model: Trophy CJ984 board
HW ID: 00
Boot: trusted – stm32image
DRAM: 512 MiB
Clocks:
– MPU : 800 MHz
…
#cpufreq-info
cpufrequtils 008: cpufreq-info (C) Dominik Brodowski 2004-2009
Report errors and bugs to cpufreq@vger.kernel.org, please.
analyzing CPU 0:
driver: cpufreq-dt
CPUs which run at the same hardware frequency: 0 1
CPUs which need to have their frequency coordinated by software: 0 1
maximum transition latency: 69.0 us.
hardware limits: 10.0 MHz – 800 MHz
available frequency steps: 10.0 MHz, 800 MHz
available cpufreq governors: userspace
current policy: frequency should be within 10.0 MHz and 800 MHz.
The governor “userspace” may decide which speed to use
within this range.
current CPU frequency is 800 MHz (asserted by call to hardware).
cpufreq stats: 10.0 MHz:28.14%, 800 MHz:71.86% (11)
analyzing CPU 1:
driver: cpufreq-dt
CPUs which run at the same hardware frequency: 0 1
CPUs which need to have their frequency coordinated by software: 0 1
maximum transition latency: 69.0 us.
hardware limits: 10.0 MHz – 800 MHz
available frequency steps: 10.0 MHz, 800 MHz
available cpufreq governors: userspace
current policy: frequency should be within 10.0 MHz and 800 MHz.
The governor “userspace” may decide which speed to use
within this range.
current CPU frequency is 800 MHz (asserted by call to hardware).
cpufreq stats: 10.0 MHz:28.14%, 800 MHz:71.86% (13)

———————————————————————–

U-Boot 2020.10-stm32mp-r1-CSD (Mar 02 2022 – 13:59:09 +0000)

CPU: STM32MP157C?? Rev.Z
Model: Trophy CJ984 board
HW ID: 00
Boot: trusted – stm32image
DRAM: 512 MiB
Clocks:
– MPU : 650 MHz
…
# cpufreq-info
cpufrequtils 008: cpufreq-info (C) Dominik Brodowski 2004-2009
Report errors and bugs to cpufreq@vger.kernel.org, please.
analyzing CPU 0:
driver: cpufreq-dt
CPUs which run at the same hardware frequency: 0 1
CPUs which need to have their frequency coordinated by software: 0 1
maximum transition latency: 0.00 ms.
hardware limits: 10.0 MHz – 650 MHz
available frequency steps: 10.0 MHz, 650 MHz
available cpufreq governors: userspace
current policy: frequency should be within 10.0 MHz and 650 MHz.
The governor “userspace” may decide which speed to use
within this range.
current CPU frequency is 650 MHz (asserted by call to hardware).
cpufreq stats: 10.0 MHz:0.00%, 650 MHz:100.00%
analyzing CPU 1:
driver: cpufreq-dt
CPUs which run at the same hardware frequency: 0 1
CPUs which need to have their frequency coordinated by software: 0 1
maximum transition latency: 0.00 ms.
hardware limits: 10.0 MHz – 650 MHz
available frequency steps: 10.0 MHz, 650 MHz
available cpufreq governors: userspace
current policy: frequency should be within 10.0 MHz and 650 MHz.
The governor “userspace” may decide which speed to use
within this range.
current CPU frequency is 650 MHz (asserted by call to hardware).
cpufreq stats: 10.0 MHz:0.00%, 650 MHz:100.00%

[Neeraj Dantu]

Fred,

Apologies for the late reply. The clock tree is setup in TF-A. This might be a change in the new version of OpenSTLinux as you could simply change the include and run with a different OPP in previous versions. OpenSTLinux supports opp-supported-hw property. OPPs can be set with hardware specific configuration with opp-supported-hardware property. As you can see, stm32mp15xf.dtsi includes stm32mp15xd.dtsi(https://github.com/STMicroelectronics/arm-trusted-firmware/blob/v2.4-stm32mp/fdts/stm32mp15xd.dtsi) which has the OPP settings corresponding to 800MHz clock setting. The opp-supported-hw property for this OPP is 0x2. For stm32mp15xc.dtsi which include stm32mp15xa.dtsi(https://github.com/STMicroelectronics/arm-trusted-firmware/blob/v2.4-stm32mp/fdts/stm32mp15xa.dtsi), the 650MHz OPP has opp-supported-hw set as 0x01.

So, if you want to run stm32mp15xc version on 800Mhz, you might have to make a change to this property in your build system. Thank you for pointing this out, we will review our app note and update it.

Best,
Neeraj

[Author]

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