OSD32MP1-RED Ethernet Issue

Forums Reference, Evaluation, and Development Boards OSD32MP1-RED OSD32MP1-RED Ethernet Issue

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    • #11618
      Arian SuarezArian Suarez
      Participant

        Hello,

        We are building a custom OpenSTLinux image for the OSD32MP1-RED. As a base, we started with the OSD32MP15x_MinimalConfig STM32CubeMX project which did work and boots correctly. When we try to add in the Ethernet port on the red board using the OSD32MP1-RED Device Tree as a guide we get the following errors:

        From uboot:

        invalid MAC address in OTP 00:00:00:00:00:00
        board_check_usb_power: Can't get adc device(-19)
        Net:   
        Error: ethernet@5800a000 address not set.
        No ethernet found.

         

        From dmesg:

         

        root@stm32mp1-viper-heavy:/opt/copasat# dmesg | grep eth
        [    0.000000] psci: probing for conduit method from DT.
        [    1.466203] usbcore: registered new interface driver cdc_ether
        [    3.007066] stm32-dwmac 5800a000.ethernet: PTP uses main clock
        [    3.011603] stm32-dwmac 5800a000.ethernet: no reset control found
        [    3.017747] stm32-dwmac 5800a000.ethernet: No phy clock provided...
        [    3.024821] stm32-dwmac 5800a000.ethernet: User ID: 0x40, Synopsys ID: 0x42
        [    3.031212] stm32-dwmac 5800a000.ethernet: 	DWMAC4/5
        [    3.036192] stm32-dwmac 5800a000.ethernet: DMA HW capability register supported
        [    3.043647] stm32-dwmac 5800a000.ethernet: RX Checksum Offload Engine supported
        [    3.051071] stm32-dwmac 5800a000.ethernet: TX Checksum insertion supported
        [    3.058080] stm32-dwmac 5800a000.ethernet: Wake-Up On Lan supported
        [    3.064408] stm32-dwmac 5800a000.ethernet: TSO supported
        [    3.069831] stm32-dwmac 5800a000.ethernet: Enable RX Mitigation via HW Watchdog Timer
        [    3.077778] stm32-dwmac 5800a000.ethernet: device MAC address 8e:57:0e:ce:ca:94
        [    3.085220] stm32-dwmac 5800a000.ethernet: TSO feature enabled
        [   34.060844] stm32-dwmac 5800a000.ethernet eth0: PHY [stmmac-0:03] driver [Micrel KSZ9031 Gigabit PHY]
        [   36.539924] stm32-dwmac 5800a000.ethernet: Failed to reset the dma
        [   36.544743] stm32-dwmac 5800a000.ethernet eth0: stmmac_hw_setup: DMA engine initialization failed
        [   36.577954] stm32-dwmac 5800a000.ethernet eth0: stmmac_open: Hw setup failed
        [   42.952190] using random self ethernet address
        [   42.955237] using random host ethernet address
        

         

        I’ve attached the STM32CubeMx project, the kernel device tree, and the tf-a device tree.

        The version of software we are using:

        – openstlinux-5.4-dunfell-mp1-20-06-24

        – en.stm32cubemx-lin_v6-2-1

        – STM32CubeMP1 Firmware Package V1.2.0

         

        I don’t know what we are missing, has anyone seen this issue before?

         

      • #11619
        Arian SuarezArian Suarez
        Participant

          STM32CubeMx config for reference.

          • This reply was modified 3 years, 9 months ago by Arian SuarezArian Suarez.
          • This reply was modified 3 years, 9 months ago by Arian SuarezArian Suarez.
        • #11632
          Neeraj Dantu
          Moderator

            Arian,

            Please take a look at https://community.st.com/s/question/0D50X0000B8iBSB/stm32mp157-ethernet-problem for more information and solution on this issue. Essentially, the RED board does not implement a 125MHz clock connection between the PHY and STM32MP1. So, this reference clock needs to be generated internally.

            Along with  https://github.com/octavosystems/OSD32MP1-RED-Device-tree/blob/main/linux-v4.19/stm32mp157c-osd32mp1-red.dtsi#L1808, You will also need to make changes to TF-A device tree like here: https://github.com/octavosystems/OSD32MP1-RED-Device-tree/blob/main/tf-a-v2.0/osd32mp1-red.dts#L164 and U-Boot device tree like here: https://github.com/octavosystems/OSD32MP1-RED-Device-tree/blob/main/u-boot-v2018.11/osd32mp1-red-u-boot.dtsi#L96.

             

            For more information, please take a look at https://wiki.st.com/stm32mpu/wiki/Ethernet_device_tree_configuration#RGMII_with_Crystal_on_PHY-2C_no_125Mhz_from_PHY.

            Best,

            Neeraj

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