EMMC routing

[JarekD]

Hi,

I wanted to use eMMC routing from RED design but I see that is not compatible with eMMC 5.0 standard shown at Figure 100 in OSD335xx Tutorial Series. DAT6 is routed through pin A6 which is VSS. Also DAT7 is routed through A7 which is RFU. According to the information in Tutorial pins A6 and A7 cannot be routed through.

So the layout of RED is not compatible with eMMC 5.0

I want to do the layout that will be compatible with newest eMMCs (there are many 5.1 chips available) and those which will be launched soon.

I have read the https://octavosystems.com/app_notes/designing-for-flexibility-around-emmc/

Is it good idea to follow the layout shown there? I want my layout to be compatible with commonly available chips for few upcoming years.

May it cause problems with newer versions of eMMC in future? Where can I find the eMMC ballout of newer version than 5.0?

Thanks you in advance,
Jaroslaw

[Eshtaartha Basu]

Hello JarekD,

We had not considered eMMC 5.x standard at the time of creating the RED design. RED design is not compatible with eMMC 5.x standard. However, we wrote the Designing for Flexibility around eMMC app note (https://octavosystems.com/app_notes/designing-for-flexibility-around-emmc/) to address the compatibility issues and help customers use eMMC 5.x standard in their design.

Yes, it is a good idea to follow the app note for eMMC 5.x standard.

You can find information about the latest eMMC standards on JEDEC website (https://www.jedec.org/standards-documents/technology-focus-areas/flash-memory-ssds-ufs-emmc/e-mmc). JEDEC is responsible for publishing eMMC standards.

To completely future proof your design, you can use very thin traces and route without overlapping any eMMC pads. But then, you will have to make sure your trace width and design rules are within the capabilities of your PCB manufacturer. They may charge you more for extended manufacturing (tighter design rules).

Our latest SiP, OSD335x C-SiP (https://octavosystems.com/octavo_products/osd335x-c-sip/), comes with an integrated eMMC in addition to all the features of OSD335x-SM. You can take a look at it and see if it matches your design requirements. OSD335x C-SiP should help you to easily get around eMMC sourcing and design issues.

[JarekD]

Thank you,

I have seen C-SiP, but first I will try to fit eMMC under the SiP to have my PCB smaller.

Is it possible to download JEDEC standards for free?

[Eshtaartha Basu]

JarekD,

The latest eMMC 5.x standards document may not be available for free. But, all the previous versions should be available for download once you sign up for a free user account on JEDEC website.

[JarekD]

Now I have another question.
In the SBC Ref Design there is a comment about U6:
This inverter can be removed if SW
is updated to change the polarity
the processor drives the eMMC reset.

How can I know if the software is updated or not?
Removing the inverter will cause no connection between the SiP and eMMC reset. I think that in case the software is updated the inverter should be replaced by non-inverting buffer or just a jumper? Am I right?

Thank you in advance

[Eshtaartha Basu]

JarekD,

A good way to know if the pin (GPMC_A4) is configured is to check the device tree of the Linux Image being used.

Yes, you could replace the inverter with a 0ohm jumper similar to what we have done in the RED design.

The SBC reference board was designed to mimic the BeagleBoard Black (BBB) design while using the OSD335x SiP. U6 was added to SBC design since BBB design had it. The Ball Reset Release State of GPMC_A4 is “L” (High Impedance with Active Pull Down Resistor). Hence, the inverter has been used to prevent eMMC reset after processor’s power on reset. However, since there is a 10K pull up attached to the RSTn line of the eMMC, it will override the weak internal pull down resistor of GPMC_A4 pin. Therefore, an inverter is not necessary. We have replaced the inverter with a 0ohm jumper in all our later reference designs (including the RED) for the same reason.

[scott_vubiq]

Hello Eshtaartha,

Regarding your latest answer describing the zero-ohm jumper, can we eliminate this resistor in our custom design, i.e. provide a direct connection between CSIP pins B12 and A4?

Thank you,

Scott

[Erik Welsh]

Scott,

Yes, you can do a direct connection between the eMMC_RSTN and GPMC_A4.  Please note that the eMMC reset is not defined in the default device tree for either the OSD3358-SM-RED or other designs from BeagleBoard.org(TM), so you would need to define it if you would like to use that functionality.  Additionally, depending on the pins you have used in the rest of the design, we would suggest choosing a pin that has a reset release state of “H” instead of “L”.  This will reduce your power consumption a little since the AM335x pull resistor will not be pulling against the internal pull up resistor to pull up the eMMC_RSTN signal.

Thanks,

Erik

[scott_vubiq]

Erik,

Thank you for the info.

We’re actually modeling the design after the OSD3358-C-SiP-RED (I didn’t realize I was in the SM device section).Does the device tree definition still apply?

Thank you,

Scott

[Erik Welsh]

Scott,

Yes.  I apologize for the confusion.  I should have said OSD3358-C-SIP-RED.  The statement about the eMMC reset not being in the device tree applies to both of the designs.

Thanks,

Erik

 

[scott_vubiq]

Erik,

Thank you for the clarification, and for your help.

Scott

[jakthree]

Erik,

OctavoSystems: OSD3358-SM
Toshiba: THGBMNG5D1LBAIL (JEDEC v5.0 interface)
Linux: 5.11.x

I am using GPMC_A4.RMII2_TXD1 for my second Ethernet PHY. I am considering using GPMC_CSN0.GPIO1_29 because pin P3 is next to the pins used for MMC1. The release state of GPMC_CSN0 is ‘H’. Your previous comment said the ‘H’ is a good thing. However I am confused about ‘L’ vs ‘H’.
Does ‘L’ mean active-low and ‘H’ mean active-high?
I understand that the eMMC_RSTN is active-low.
Will a ‘H’ output hold the line low keeping the EMMC in a reset condition?

You mention that  “Please note that the eMMC reset is not defined in the default device tree for either the OSD3358-SM-RED or other designs from BeagleBoard.org(TM), so you would need to define it if you would like to use that functionality.”
Can you provide an example of what to add to the device tree to define using GPIO1_29 to control eMMC_RSTN?

Thank you,

[Neeraj Dantu]

Jack,

‘H’ and ‘L’ refer to reset release states. This is the state of the pin after reset is released, but the pin is not being controlled by firmware.

 

Please take a look at https://www.kernel.org/doc/Documentation/devicetree/bindings/gpio/gpio.txt for information on specifying gpio definitions in device tree. On newer kernels, it is possible to do definitions like this:https://github.com/STMicroelectronics/linux/blob/v6.1-stm32mp/arch/arm/boot/dts/stm32mp15xx-dkx.dtsi#L218C3-L218C45 for reset.

Best,

Neeraj

[Author]

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