eMMC Data sheet/Wear leveling
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Tagged: emmc, memory, wear leaving
- This topic has 4 replies, 2 voices, and was last updated 9 months, 3 weeks ago by
Neeraj Dantu.
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- January 15, 2024 at 4:09 pm #14245
Our firmware engineer is asking me (the hardware engineer) about learning more about the eMMC inside but I can’t find a datasheet for it.
Does Octavo source a single eMMC chip or do you use several manufacturers?
Here’s what he says:
“We are solely interested in determining the eMMC origin to be able to check whether it implements ‘wear leveling’.”
- January 19, 2024 at 9:55 am #14271
Ryan,
The eMMC inside OSD335x C-SiP implements wear-leveling. Specifically, we ensure that the eMMC is compliant to eMMC JEDEC v4.3 or higher.
Best,
Neeraj
- January 23, 2024 at 11:32 am #14278
Thanks for the information Neeraj, I will look up that specification.
- January 23, 2024 at 11:51 am #14279
Neeraj,
I found the JEDEC standard document but I do not see anything on wear-leveling or endurance.
Do you have a datasheet of the eMMC used inside the C-SiP?
Thanks,
Ryan
- January 31, 2024 at 2:05 pm #14290
Ryan,
Please contact sales(at)octavosystems.com for additional information on this.
Best,
Neeraj
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