OSD32MP1 Low Power Modes

Published On: September, 9, 2020 By: Neeraj Dantu

Optomizing the power consumption of a system is no longer just the goal of battery powered applications. Optimizing the power has effects on thermal management, performance, and cost so making sure it is dialed in for your application is key. The OSD32MP15x, the STM32MP15x System in Package (SiP), integrates the processor and STPMIC1 together in to enable the designer to optimize the power consumption for their applications.

This application note provides an overview of the low power modes and low power configuration of the OSD32MP15x.

For more information on the specifics of the integrated STPMIC1 please see the Power System Overview and Functionality App note.

If you are interested in power budgeting for the OSD32MP1 please see the Power Budgeting App Note.

Low Power Architecture and Strategies for OSD32MP15x

Inside the OSD32MP15x, the STM32MP15x comes with multiple ways to optimize power consumption. The STM32MP1 Series using low power modes application note details power saving methods and information on low power modes. The main way to save power is to enter a low power mode when a CPU is idle. The Cortex-M4 (MCU) subsystem’s low power modes (CSleep and CStop) can be entered executing the WFI (wait for interrupt) or WFE (wait for event) instructions or when the SLEEPONEXIT bit in the Control register is set on Return from ISR. This can be done through the bare metal application programming code that is run on the MCU. The Dual Cortex-A7 (MPU) subsystem’s low power modes (CSleep, CStop, and CStandby) can be entered similarly but is primarily done through standard Linux power management interfaces.

A high-level block diagram of the power system architecture is shown below.

The MPU subsystem and the MCU subsystem can each be in a different power state. There are three power states for the MCU and four power states for the MPU. They are listed in the following table.

⁽¹⁾ By default in the OpenST Linux distribution, VDD_CORE is turned OFF during MPU Standby mode. This is configurable.

In addition to the CPU power states, there are also system level power states. The below table shows the mapping between system power states and MPU/MCU power states:

From the Power State Table, there are three register bits that can control the power states for the MPU/MCU within a system power state. They are listed in the below table along with the settings and corresponding low power modes achievable.

Setting these bits, and by implication the power state of the processor in a given system power state, can be done in “pwr” node of the Linux Device Tree.

To set the voltage rails of the PMIC, the STM32MP15x uses two interfaces to the STPMIC1A:

Within Linux, a product can use both interfaces to customize the power rail behavior in the different power states. For example, the VDD_CORE power rail uses both the PWR_ON control pin and the I2C interface to set whether the rail is on or off in the different system power states. The table below shows the PWR_ON levels in the corresponding system power state for the default OpenST Linux distribution.

NOTE: The behavior of PWR_ON is controlled by LPCFG bit of PWR_CR1 register of STM32MP15x which in case of using the STPMIC1A integrated in OSD32MP15x should always set to be ‘1’. This is the default setting in OpenST Linux distribution.

As can be seen from the table, the I2C interface is used instead of the PWR_ON signal to modify the state of VDD_CORE in the Standby power state. To modify/shutdown other power rails based on the state of the PWR_ON signal the PREG_MODE and ENA bits of the following registers are used:

NOTE: In the default OpenST Linux distribution, the alternate control registers (XXXX_ALT_CR) are configured to disable the corresponding power rail.

The configuration of described hardware architecture and entry/exit configuration for each low power mode can be handled in the OpenST Linux distribution.

Using Power Management under Linux

The infrastructure described in the previous section is used by the Linux Suspend Framework to allow Linux to control the system power states. The following figure shows the power management software framework in Linux.

The drivers and features required for transition and management of power states are only available in the Secure monitor CPU operating state. The Secure monitor is implemented in TF-A, which is used as the FSBL (First Stage Bootloader) in the OpenST Linux distribution. The BL32 component of the TF-A or OPTEE can handle the power mode state transitions and PMIC register programming via the Power State Coordination Interface (PSCI). Because the features required to access low power modes are only available in TF-A/OPTEE, only trusted/secure Linux images can be used to support low power modes in target applications.

Entering a Low Power State

There are two distinct ways to initiate a low power state transition depending on which low power state is targeted. The below table shows the two Linux commands and their corresponding low power states.

Under the hood, the suspend framework notifies all the device drivers to prepare for low power entry and then calls the PSCI service, which then implements the low power mode transition.

The “mem” command can be used to initiate multiple low power states. The state that the system enters is determined by the wake-up source selected. The wakeup sources and their corresponding low power modes are displayed in the following table.

Each group has different peripherals that can be used as wake up sources from low power states. The table below describes which peripherals belong to each group as well as the low power state from which the peripherals can wake up the system.

Not all power state transitions are valid from each system power state. The figure below graphically shows the power state transitions that are available at each system power state:

For example, the LP-Stop power state can be achieved by using the following commands with a UART console wakeup source:

1. echo enabled > /sys/devices/platform/soc/40010000.serial/tty/ttySTM0/power/wakeup
2. echo enabled > /sys/devices/platform/soc/40010000.serial/power/wakeup
3. echo mem > /sys/power/state

Commands 1 and 2 are used to set up UART console as the wakeup source. This sets up the device to wake up when there is activity on UART console and resume activity in Run mode. Command 3 activates the entry into low power state.

The power architecture of the OSD32MP15x Family of devices provides a flexible framework to allow a system to achieve many different power states. The different power states provide flexibility when designing and budgeting the power system and understand overall system power consumption, especially in battery operated applications. The OSD32MP1 Power Budgeting App Note describes the power budgeting process necessary to build a robust power system for products / designs.

Conclusion

In conclusion the STM32MP1 and the STMPMIC1 integrated into the OSD32MP1 System-in-Package provide many options for different power modes and states. These different states allow a designer to hone in the power consumption to what is required by their application.

This App note provided an overview of the different low power states and how to configure them. If you have more questions, please ask in our Forums.

Revision History

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