Designing for Flexibility around eMMC
Published On: February, 7, 2018 By: Erik Welsh | Updated: February 2, 2022 by Greg Sheridan
When choosing non-volatile storage memory for your design, Embedded MultiMediaCard (eMMC) technology provides many advantages over standard Secure Digital (SD) cards in terms of performance, reliability and form factor. However, there can be supply constraints when sourcing eMMC devices as a design moves into manufacturing. This application note walks through some simple steps to take, during the design process, to create flexibility in the design to accept various revisions of eMMC. These steps will help to mitigate supply issues by enabling multiple existing revisions of eMMC to work with your design as well as future-proof your design for new revisions of eMMC.
Table of Contents
1. eMMC Versions
2. Schematics
3. Layout
4. Conclusion
A PDF version of this App Note can be found here.
1. eMMC Versions
The JEDEC Solid State Technology Association is an independent semiconductor engineering trade organization and standardization body. JEDEC defines the eMMC standard and has released a number of versions of this standard. When the Texas Instruments Sitara ARM® Cortex® A8 AM335x Processor within the OSD335x System-In-Package Family was designed the released eMMC standard was version 4.3 (v4.3). Therefore, the OSD335x SiP supports the standard v4.3 command and response set. However, the newest eMMC memory devices available on the market (at this writing) support the standard v5.1 command and response set. Fortunately, the newer eMMC devices are backward compatible with the older eMMC specifications.
Therefore, it is straightforward to create designs around the OSD335x Family of devices that utilize the newest eMMC memory devices. The main caveat being that product designs need to comprehend the changes in schematics and layout between the eMMC v4.3 and eMMC v5.1 standards. Designing to the JEDEC standard itself rather than following a particular eMMC vendor data-sheet will give the most flexibility when sourcing eMMC devices.
2. Schematics
When starting a design, the first step normally involves creating or obtaining a schematic symbol based on the datasheet of the part. However, in the case of eMMC, some pins within the standard are optional and may not be implemented by a given device, such as vendor specific function pins (VSF). This can lead a design to mistakenly consider these pins as unimportant which can then limit the design to only using parts that implement a particular subset of the standard. Therefore, the schematic symbol should instead reflect the eMMC v5.1 standard. It should also include all “Reserve for Future Use” (RFU) pins so that it is clear which pins are “No Connect” (NC) vs RFU. The NC pins can be routed through while the RFU pins should be avoided during routing.
Unfortunately, many datasheets do not mark all of the pins that are defined / reserved by the eMMC standard. For example, Figure 1 shows a current ball map for a eMMC v5.1 part.
However, when looking at the JEDEC standard pin layout (see yellow and orange pins) in Figure 2 below, there are a number of pins that differ from our example in Figure 1. For example, there are several pins that are marked as “NC” in the Figure 1 ball map that are actually used by the standard. This includes the “RFU” pins as well as some additional “VSF” pins. See examples highlighted in figure 3.
You can find the standard layout of eMMC pins in JEDEC Standard No. 21-C, Figure 3.12.1-49.
You can see above in Figure 3, two examples of pins that are utilized in the vendor’s datasheet as NC that are reserved differently in the standard.
Figure 4 below shows the eMMC v4.3 interface of the OSD335x Family connected to an eMMC v5.x component. All of the reserved and additional pins are designated on the schematic symbol so it is easier to understand and avoid those pins in layout.
3. Layout
The 153 ball eMMC footprint is very standard and supports a broad range of devices from many manufacturers. While, there may be smaller footprints, for maximum flexibility it is best to use the 11.5mm x 13mm outline for the size of eMMC device. All pins marked “NC” in the JEDEC standard (i.e. all the white and green pins in Figure 2) are purely structural (i.e. not electrically connected) and may be routed through, according to the standard.
Figure 5 shows an example escape routing of a v5.x eMMC device using 6 mil trace / 6 mil space routing and 12 mil drill / 24 mil finished vias. One thing to note is that due to the eMMC ball spacing, the traces may need to be adjusted ¼ or ½ a mil to center the trace through the “NC” balls.
When routing through “NC” pins, this will create overlap errors in design tools like EAGLE. Figure 6 shows the overlap design errors that are created from the example BGA escape shown in Figure 5. While these errors can be ignored, it is important to make sure that none of the reserved or otherwise specified pins of the eMMC v5.x standard have been routed through. Also, there should be no clearance errors. If clearance errors exist, then the traces should be adjusted accordingly to center them through the eMMC ball.
4. Conclusion
From the example above, it is clear that by observing a few simple schematic and layout rules, new designs take advantage of both the newer eMMC v5.x as well as the older eMMC v4.x parts when sourcing eMMC for an OSD335x Family design.
For additional assistance laying out your design using the OSD335x Family of devices, please connect directly to our engineers on the forums at www.octavosystems.com/forums