DMIC-DFSDM Interface on OSD32MP1-RED board

Forums Reference, Evaluation, and Development Boards OSD32MP1-RED DMIC-DFSDM Interface on OSD32MP1-RED board

Viewing 1 reply thread
  • Author
    Posts
    • #12033
      Farid AzharFarid Azhar
      Participant

        We are trying to interface a single Digital Microphone with PDM output to OSD32MP1-RED board using DFSDM peripheral.
        I’ve modifed the devicetree (kernel, uboot, tfa) for the following signals between DMIC and RPi connector (JP20) on OSD32MP1-RED board.

        DMIC_DATA => JP20/p.10 => PB12 (DFSDM1_DATIN1)
        DMIC_GND => JP20/p.6
        DMIC_CLK => JP20/p.36 => PB13 (DFSDM1_CKOUT)
        DMIC_VDD => JP20/p.1 (3.3V)

        Code compiles and runs OK, and I see the dfsdm iio node and alsa command “arecord -l” shows the soundcard entry.
        $ sudo arecord -l
        **** List of CAPTURE Hardware Devices ****
        card 0: STM32MP1DK [STM32MP1-DK], device 0: 4400d000.dfsdm:filter@0:dfsdm-d-dmic-hifi dmic-hifi-0 []
        Subdevices: 1/1
        Subdevice #0: subdevice #0
        $

        The audio record command completes successfully but the captured audio file is empty, no sound at all.
        After some debugging I found that DFSDM Clock on pin PB13 (DFSDM1_CKOUT) is not generating when recording is started, tested with the oscilloscope.
        It looks the DFSDM driver is not generating the clock or got the wrong clock setting.

        I followed the application note AN5027, DFSDM Devicetree structure in STM32MP157C-EV1 board and the STM32CubeMX.
        Following are the changes I made in OSD32MP1-RED board device tree. Would appreciate if someone could point out if something is wrong or missing here.

        Updates in kernel DT file “osd32mp1-red.dts”
        ——————————————-
        sound {
        compatible = “audio-graph-card”;
        label = “STM32MP1-DK”;
        dais = <&dfsdm0_port>;
        status = “okay”;
        };

        dmic0: dmic-0 {
        compatible = “dmic-codec”;
        sound-name-prefix = “dmic0”;
        #sound-dai-cells = <1>;
        status = “okay”;

        port {
        dmic0_endpoint: endpoint {
        remote-endpoint = <&dfsdm_endpoint0>;
        };
        };
        };

        &dfsdm {
        pinctrl-names = “default”, “sleep”;
        pinctrl-0 = <&dfsdm_pins_mx>;
        pinctrl-1 = <&dfsdm_sleep_pins_mx>;
        status = “okay”;

        /* USER CODE BEGIN dfsdm */
        spi-max-frequency = <30000000>;
        clocks = <&rcc DFSDM_K>, <&rcc ADFSDM_K>;
        clock-names = “dfsdm”, “audio”;

        dfsdm0: filter@0 {
        compatible = “st,stm32-dfsdm-dmic”;
        st,adc-channels = <1>;
        st,adc-channel-names = “dmic0”;
        st,adc-channel-types = “SPI_R”;
        st,adc-channel-clk-src = “CLKOUT”;
        st,filter-order = <3>;
        status = “okay”;

        asoc_pdm0: dfsdm-dai {
        compatible = “st,stm32h7-dfsdm-dai”;
        #sound-dai-cells = <0>;
        io-channels = <&dfsdm0 0>;
        status = “okay”;

        dfsdm0_port: port {
        dfsdm_endpoint0: endpoint {
        remote-endpoint = <&dmic0_endpoint>;
        };
        };
        };
        };
        /* USER CODE END dfsdm */
        };

        &pinctrl {
        u-boot,dm-pre-reloc;

        dfsdm_pins_mx: dfsdm_mx-0 {
        pins1 {
        pinmux = <STM32_PINMUX(‘B’, 12, AF6)>; /* DFSDM1_DATIN1 */
        bias-disable;
        };
        pins2 {
        pinmux = <STM32_PINMUX(‘B’, 13, AF3)>; /* DFSDM1_CKOUT */
        bias-disable;
        drive-push-pull;
        slew-rate = <0>;
        };
        };

        dfsdm_sleep_pins_mx: dfsdm_sleep_mx-0 {
        pins {
        pinmux = <STM32_PINMUX(‘B’, 12, ANALOG)>, /* DFSDM1_DATIN1 */
        <STM32_PINMUX(‘B’, 13, ANALOG)>; /* DFSDM1_CKOUT */
        };
        };

        Updates in u-boot DT file “osd32mp1-red-u-boot.dtsi”
        ——————————————-
        CLK_SAI1_PLL4Q
        CLK_SAI2_DISABLED
        CLK_SAI3_DISABLED
        CLK_SAI4_DISABLED

        Updates in tfa DT file “osd32mp1-red.dts”
        ——————————————-
        CLK_SAI1_PLL4Q
        CLK_SAI2_DISABLED
        CLK_SAI3_DISABLED
        CLK_SAI4_DISABLED
        DECPROT(STM32MP1_ETZPC_DFSDM_ID, DECPROT_NS_RW, DECPROT_UNLOCK)
        DECPROT(STM32MP1_ETZPC_SAI1_ID, DECPROT_NS_RW, DECPROT_UNLOCK)

      • #12090
        Neeraj Kumar Reddy DantuNeeraj Dantu
        Moderator

          Issue was resolved offline.

          spi-max-frequency was set tp 30MHz causing an error in DFSDM interface setup. sps-max-frequency should be 3MHz.

          Neeraj

      Viewing 1 reply thread
      • You must be logged in to reply to this topic.