GPIO Pins connected to Peripherals at Startup
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- This topic has 1 reply, 2 voices, and was last updated 4 years, 6 months ago by
Neeraj Dantu.
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- May 7, 2020 at 4:10 am #10089
Hi,
We are using the OSD335x C-SIP and have a question regarding the GPIO pins. We are connecting these pins to out-board peripherals and some have separate power supplies. At power-up, the connected peripherals may be on and trying to send data to the GPIO pins of the C-SIP prior to the full power-up. These GPIO data lines may even be pulled up to a Vdd by the peripheral circuitry. So our questions are:
1) Does having a 3.3V voltage at GPIO pins during power-up cause any issues to the C-SIP? (Normally these data lines would be pulled up by the C-SIP after the SYS_VDD1_3P3V rail is powered but since the peripherals are already connected we may already have signals before SYS_VDD1_3P3V rais is up)
2) Are GPIO of C-SIP pins 5V tolerant? So, for example if the UART signal lines are connected to a 5V peripheral device, would it cause any issues?
If it is not permissible to have any kind of voltage at GPIO pins during power-up, how would you suggest we mitigate the issue?
Thank you in advance for your response.
Regards,
Beko
- May 13, 2020 at 10:06 am #10184
Beko,
Both #1 and #2 are not recommended and will result in operating the SiP and SoC out of spec.
The way to mitigate these issue would be the following:
1. Use buffers(bidirectional if needed) with enable input. You can tie the enable pin to either SYS_VDD3_3P3V(powers the IO domain of the SoC) or a GPIO that you can control based on when you want the device to communicate with off-board peripherals.
2. You should not connect any GPIO to 5V. This poses a risk of permanent damage to the SoC. A voltage translator buffer is the best solution for this issue.
Please let us know if you have more questions.
Best,
Neeraj
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