/*
 * Copyright (C) 2017-18 Octavo Systems (octavosystems.com)
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */

 /dts-v1/;

 #include "osd335x-sm.dtsi"

 #include <dt-bindings/display/tda998x.h>

/ {

 	leds
	{
 		pinctrl-names = "default", "sleep";
 		pinctrl-0 = <&user_leds_default>;
 		pinctrl-1 = <&user_leds_sleep>;

 		compatible = "gpio-leds";

 		led@2
		{
 			label = "beaglebone:green:usr0";
 			gpios = <&gpio2 1 GPIO_ACTIVE_HIGH>;
 			linux,default-trigger = "heartbeat";
 			default-state = "off";
 		};

 		led@3
		{
 			label = "beaglebone:green:usr1";
 			gpios = <&gpio2 0 GPIO_ACTIVE_HIGH>;
 			linux,default-trigger = "cpu0";
 			default-state = "off";
 		};

 	};

 	vmmcsd_fixed: fixedregulator@0
	{
 		compatible = "regulator-fixed";
 		regulator-name = "vmmcsd_fixed";
 		regulator-min-microvolt = <3300000>;
 		regulator-max-microvolt = <3300000>;
 	};
};

 &uart0
 {
 	pinctrl-names = "default";
 	pinctrl-0 = <&uart0_pins_default>;

 	status = "okay";
 };

 &usb
 {
 	status = "okay";
 };

 &usb_ctrl_mod
 {
 	status = "okay";
 };

 &usb0_phy
 {
 	status = "okay";
 };

 &usb1_phy
 {
 	status = "okay";
 };

 &usb0
 {
  pinctrl-0 = <&myusb1_pins_default>;
 	status = "okay";
 	dr_mode = "peripheral";
 };

 &usb1
 {
  pinctrl-0 = <&myusb2_pins_default>;
 	status = "okay";
 	dr_mode = "host";
 };

 &cppi41dma
 {
 	status = "okay";
 };

&ldo3_reg
{
	regulator-min-microvolt = <1800000>;
	regulator-max-microvolt = <1800000>;
	regulator-always-on;
};

&mmc1
{
  status = "okay";
  bus-width = <0x4>;
  pinctrl-names = "default";
  pinctrl-0 = <&mmc0_pins_default>;
  cd-gpios = <&gpio3 17 GPIO_ACTIVE_LOW>;

	vmmc-supply = <&vmmcsd_fixed>;
};

&mmc2
{
	vmmc-supply = <&vmmcsd_fixed>;
	pinctrl-names = "default";
	pinctrl-0 = <&mmc1_pins_default>;
	bus-width = <8>;
	status = "okay";
};

&cpu0_opp_table
{
	/*
	 * All PG 2.0 silicon may not support 1GHz but some of the early
	 * BeagleBone Blacks have PG 2.0 silicon which is guaranteed
	 * to support 1GHz OPP so enable it for PG 2.0 on this board.
	 */
	oppnitro@1000000000
  {
		opp-supported-hw = <0x06 0x0100>;
	};
};



&tscadc
{
	status = "okay";
};

&am335x_adc
{
	ti,adc-channels = <0 1 2 3 4 5 6 7>;
};

&aes
{
	status = "okay";
};

&sham
{
	status = "okay";
};

&wkup_m3_ipc
{
	ti,scale-data-fw = "am335x-bone-scale-data.bin";
};

&rtc
{
  pinctrl-0 = <&myrtc1_pins_default>;
	clocks = <&clk_32768_ck>, <&clkdiv32k_ick>;
	clock-names = "ext-clk", "int-clk";
	system-power-controller;
};

&sgx
 {
	status = "disabled";
};


&cpsw_emac0
{
	phy_id = <&davinci_mdio>, <0>;
	phy-mode = "mii";
	dual_emac_res_vlan = <1>;
};

&cpsw_emac1
{
	phy_id = <&davinci_mdio>, <4>;
	phy-mode = "mii";
	dual_emac_res_vlan = <2>;
};

&mac
{
	pinctrl-names = "default", "sleep";
	pinctrl-0 = <&mii_pins_default>;
	#pinctrl-1 = <&cpsw_sleep>;
	dual_emac = <1>;
	status = "okay";
};

&davinci_mdio
{
	pinctrl-names = "default", "sleep";
	pinctrl-0 = <&mymdio1_pins_default>;
	pinctrl-1 = <&mymdio1_pins_sleep>;
	status = "okay";
};

&dcan1
{
	pinctrl-0 = <&can2_pins_default>;
  status = "okay";
};

&dcan0
{
	pinctrl-0 = <&can1_pins_default>;
  status = "okay";
};

&spi0
{
  pinctrl-0 = <&spi0_pins_default>;
  status = "okay";
};

&spi1
{
  pinctrl-0 = <&spi1_pins_default>;
  status = "okay";
};

&am33xx_pinmux
{

  can1_pins_default: can1_pins_default
  {
  	pinctrl-single,pins = <
  		AM33XX_IOPAD(0x17c, PIN_INPUT | MUX_MODE2) /* (D17) uart1_rtsn.dcan0_rx */
  		AM33XX_IOPAD(0x178, PIN_OUTPUT | MUX_MODE2) /* (D18) uart1_ctsn.dcan0_tx */
  	>;
  };

  can2_pins_default: can2_pins_default
  {
  	pinctrl-single,pins = <
  		AM33XX_IOPAD(0x184, PIN_INPUT | MUX_MODE2) /* (D15) uart1_txd.dcan1_rx */
  		AM33XX_IOPAD(0x180, PIN_OUTPUT | MUX_MODE2) /* (D16) uart1_rxd.dcan1_tx */
  	>;
  };

  mydebugss1_pins_default: mydebugss1_pins_default
  {
  	pinctrl-single,pins = <
  		AM33XX_IOPAD(0x1d0, PIN_INPUT | MUX_MODE0) /* (C11) TMS.TMS */
  		AM33XX_IOPAD(0x1d4, PIN_INPUT | MUX_MODE0) /* (B11) TDI.TDI */
  		AM33XX_IOPAD(0x1d8, PIN_OUTPUT | MUX_MODE0) /* (A11) TDO.TDO */
  		AM33XX_IOPAD(0x1dc, PIN_INPUT | MUX_MODE0) /* (A12) TCK.TCK */
  		AM33XX_IOPAD(0x1e0, PIN_INPUT | MUX_MODE0) /* (B10) nTRST.nTRST */
  		AM33XX_IOPAD(0x1e4, PIN_INPUT | MUX_MODE0) /* (C14) EMU0.EMU0 */
  		AM33XX_IOPAD(0x1e8, PIN_INPUT | MUX_MODE0) /* (B14) EMU1.EMU1 */
  		AM33XX_IOPAD(0x1a4, PIN_INPUT | MUX_MODE4) /* (C13) mcasp0_fsr.EMU2 */
  	>;
  };

  myglue1_pins_default: myglue1_pins_default
  {
  	pinctrl-single,pins = <
  		AM33XX_IOPAD(0x1b8, PIN_INPUT | MUX_MODE0) /* (A10) nRESETIN_OUT.nRESETIN_OUT */
  		AM33XX_IOPAD(0x1c0, PIN_INPUT | MUX_MODE0) /* (B18) nNMI.nNMI */
  		AM33XX_IOPAD(0x1b0, PIN_INPUT | MUX_MODE0) /* (A15) xdma_event_intr0.xdma_event_intr0 */
  		AM33XX_IOPAD(0x1b4, PIN_OUTPUT | MUX_MODE3) /* (D14) xdma_event_intr1.clkout2 */
  	>;
  };

  user_leds_default: user_leds_default
  {
  	pinctrl-single,pins = <
  		AM33XX_IOPAD(0x88, PIN_INPUT | MUX_MODE7) /* (T13) gpmc_csn3.gpio2[0] */
  		AM33XX_IOPAD(0x8c, PIN_INPUT | MUX_MODE7) /* (V12) gpmc_clk.gpio2[1] */
    >;
  };

  user_leds_sleep: user_leds_sleep
  {
    pinctrl-single,pins = <
      AM33XX_IOPAD(0x88, PIN_INPUT | MUX_MODE7) /* (T13) gpmc_csn3.gpio2[0] */
      AM33XX_IOPAD(0x8c, PIN_INPUT | MUX_MODE7) /* (V12) gpmc_clk.gpio2[1] */
    >;
  };

  emmc_rst_pin_default: emmc_rst_pin_default
  {
  	pinctrl-single,pins = <
  		AM33XX_IOPAD(0x90, PIN_INPUT_PULLDOWN | MUX_MODE7) /* (R7) gpmc_advn_ale.gpio2[2] */
    >;
  };

  spi0_int_pin_default: spi0_int_pin_default
  {
    pinctrl-single,pins = <
      AM33XX_IOPAD(0x9c, PIN_INPUT | MUX_MODE7) /* (T6) gpmc_be0n_cle.gpio2[5] */
    >;
  };

  spi1_int_pin_default: spi1_int_pin_default
  {
    pinctrl-single,pins = <
      AM33XX_IOPAD(0x98, PIN_INPUT | MUX_MODE7) /* (U6) gpmc_wen.gpio2[4] */
    >;
  };

  mygpio2_pins_default: mygpio2_pins_default
  {
  	pinctrl-single,pins = <
  		AM33XX_IOPAD(0x94, PIN_INPUT | MUX_MODE7) /* (T7) gpmc_oen_ren.gpio2[3] */
  		AM33XX_IOPAD(0xe0, PIN_INPUT | MUX_MODE7) /* (U5) lcd_vsync.gpio2[22] */
  		AM33XX_IOPAD(0xe4, PIN_INPUT | MUX_MODE7) /* (R5) lcd_hsync.gpio2[23] */
  		AM33XX_IOPAD(0xe8, PIN_INPUT | MUX_MODE7) /* (V5) lcd_pclk.gpio2[24] */
  		AM33XX_IOPAD(0xec, PIN_INPUT | MUX_MODE7) /* (R6) lcd_ac_bias_en.gpio2[25] */
  	>;
  };

  mygpio3_pins_default: mygpio3_pins_default
  {
  	pinctrl-single,pins = <
  		AM33XX_IOPAD(0x19c, PIN_INPUT | MUX_MODE7) /* (C12) mcasp0_ahclkr.gpio3[17] */
  		AM33XX_IOPAD(0x1a0, PIN_INPUT | MUX_MODE7) /* (B12) mcasp0_aclkr.gpio3[18] */
  		AM33XX_IOPAD(0x1a8, PIN_INPUT | MUX_MODE7) /* (D13) mcasp0_axr1.gpio3[20] */
  		AM33XX_IOPAD(0x1ac, PIN_INPUT | MUX_MODE7) /* (A14) mcasp0_ahclkx.gpio3[21] */
  	>;
  };

  mygpio1_pins_default: mygpio1_pins_default
  {
  	pinctrl-single,pins = <
  		AM33XX_IOPAD(0x30, PIN_INPUT | MUX_MODE7) /* (T12) gpmc_ad12.gpio1[12] */
  		AM33XX_IOPAD(0x34, PIN_INPUT | MUX_MODE7) /* (R12) gpmc_ad13.gpio1[13] */
  		AM33XX_IOPAD(0x38, PIN_INPUT | MUX_MODE7) /* (V13) gpmc_ad14.gpio1[14] */
  		AM33XX_IOPAD(0x3c, PIN_INPUT | MUX_MODE7) /* (U13) gpmc_ad15.gpio1[15] */
  		AM33XX_IOPAD(0x7c, PIN_INPUT | MUX_MODE7) /* (V6) gpmc_csn0.gpio1[29] */
  	>;
  };

  mygpio0_pins_default: mygpio0_pins_default
  {
  	pinctrl-single,pins = <
  		AM33XX_IOPAD(0x20, PIN_INPUT | MUX_MODE7) /* (U10) gpmc_ad8.gpio0[22] */
  		AM33XX_IOPAD(0x24, PIN_INPUT | MUX_MODE7) /* (T10) gpmc_ad9.gpio0[23] */
  		AM33XX_IOPAD(0x28, PIN_INPUT | MUX_MODE7) /* (T11) gpmc_ad10.gpio0[26] */
  		AM33XX_IOPAD(0x2c, PIN_INPUT | MUX_MODE7) /* (U12) gpmc_ad11.gpio0[27] */
  	>;
  };

  i2c0_pins: i2c0_pins
  {
  	pinctrl-single,pins = <
  		AM33XX_IOPAD(0x18c, PIN_INPUT | MUX_MODE0) /* (C16) I2C0_SCL.I2C0_SCL */
  		AM33XX_IOPAD(0x188, PIN_INPUT | MUX_MODE0) /* (C17) I2C0_SDA.I2C0_SDA */
  	>;
  };

  i2c1_pins: i2c1_pins
  {
  	pinctrl-single,pins = <
  		AM33XX_IOPAD(0x16c, PIN_INPUT | MUX_MODE3) /* (E17) uart0_rtsn.I2C1_SCL */
  		AM33XX_IOPAD(0x168, PIN_INPUT | MUX_MODE3) /* (E18) uart0_ctsn.I2C1_SDA */
  	>;
  };

  mylcdc1_pins_default: mylcdc1_pins_default
  {
  	pinctrl-single,pins = <
  		AM33XX_IOPAD(0xa0, PIN_OUTPUT | MUX_MODE0) /* (R1) lcd_data0.lcd_data0 */
  		AM33XX_IOPAD(0xa4, PIN_OUTPUT | MUX_MODE0) /* (R2) lcd_data1.lcd_data1 */
  		AM33XX_IOPAD(0xa8, PIN_OUTPUT | MUX_MODE0) /* (R3) lcd_data2.lcd_data2 */
  		AM33XX_IOPAD(0xac, PIN_OUTPUT | MUX_MODE0) /* (R4) lcd_data3.lcd_data3 */
  		AM33XX_IOPAD(0xb0, PIN_OUTPUT | MUX_MODE0) /* (T1) lcd_data4.lcd_data4 */
  		AM33XX_IOPAD(0xb4, PIN_OUTPUT | MUX_MODE0) /* (T2) lcd_data5.lcd_data5 */
  		AM33XX_IOPAD(0xb8, PIN_OUTPUT | MUX_MODE0) /* (T3) lcd_data6.lcd_data6 */
  		AM33XX_IOPAD(0xbc, PIN_OUTPUT | MUX_MODE0) /* (T4) lcd_data7.lcd_data7 */
  		AM33XX_IOPAD(0xc0, PIN_OUTPUT | MUX_MODE0) /* (U1) lcd_data8.lcd_data8 */
  		AM33XX_IOPAD(0xc4, PIN_OUTPUT | MUX_MODE0) /* (U2) lcd_data9.lcd_data9 */
  		AM33XX_IOPAD(0xc8, PIN_OUTPUT | MUX_MODE0) /* (U3) lcd_data10.lcd_data10 */
  		AM33XX_IOPAD(0xcc, PIN_OUTPUT | MUX_MODE0) /* (U4) lcd_data11.lcd_data11 */
  		AM33XX_IOPAD(0xd0, PIN_OUTPUT | MUX_MODE0) /* (V2) lcd_data12.lcd_data12 */
  		AM33XX_IOPAD(0xd4, PIN_OUTPUT | MUX_MODE0) /* (V3) lcd_data13.lcd_data13 */
  		AM33XX_IOPAD(0xd8, PIN_OUTPUT | MUX_MODE0) /* (V4) lcd_data14.lcd_data14 */
  		AM33XX_IOPAD(0xdc, PIN_OUTPUT | MUX_MODE0) /* (T5) lcd_data15.lcd_data15 */
  	>;
  };

  mymdio1_pins_default: mymdio1_pins_default
  {
  	pinctrl-single,pins = <
  		AM33XX_IOPAD(0x14c, PIN_OUTPUT_PULLUP | MUX_MODE0) /* (M18) mdio_clk.mdio_clk */
  		AM33XX_IOPAD(0x148, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* (M17) mdio_data.mdio_data */
  	>;
  };
  
  mymdio1_pins_sleep: mymdio1_pins_sleep
  {
  	pinctrl-single,pins = <
  		AM33XX_IOPAD(0x14c, PIN_INPUT_PULLDOWN | MUX_MODE7) /* (M18) mdio_clk.mdio_clk */
  		AM33XX_IOPAD(0x148, PIN_INPUT_PULLDOWN | MUX_MODE7) /* (M17) mdio_data.mdio_data */
  	>;
  };

  mii_pins_default: mii_pins_default
  {
  	pinctrl-single,pins = <
		/* Slave 1 */
  		AM33XX_IOPAD(0x108, PIN_INPUT | MUX_MODE0) /* (H16) gmii1_col.gmii1_col */
  		AM33XX_IOPAD(0x10c, PIN_INPUT | MUX_MODE0) /* (H17) gmii1_crs.gmii1_crs */
  		AM33XX_IOPAD(0x910, PIN_INPUT_PULLUP | MUX_MODE0) /* (J15) gmii1_rxer.gmii1_rxer */
  		AM33XX_IOPAD(0x914, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* (J16) gmii1_txen.gmii1_txen */
  		AM33XX_IOPAD(0x918, PIN_INPUT_PULLUP | MUX_MODE0) /* (J17) gmii1_rxdv.gmii1_rxdv */
  		AM33XX_IOPAD(0x92c, PIN_INPUT_PULLUP | MUX_MODE0) /* (K18) gmii1_txclk.gmii1_txclk */
  		AM33XX_IOPAD(0x930, PIN_INPUT_PULLUP | MUX_MODE0) /* (L18) gmii1_rxclk.gmii1_rxclk */
  		AM33XX_IOPAD(0x928, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* (K17) gmii1_txd0.gmii1_txd0 */
  		AM33XX_IOPAD(0x924, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* (K16) gmii1_txd1.gmii1_txd1 */
  		AM33XX_IOPAD(0x920, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* (K15) gmii1_txd2.gmii1_txd2 */
  		AM33XX_IOPAD(0x91c, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* (J18) gmii1_txd3.gmii1_txd3 */
  		AM33XX_IOPAD(0x940, PIN_INPUT_PULLUP | MUX_MODE0) /* (M16) gmii1_rxd0.gmii1_rxd0 */
  		AM33XX_IOPAD(0x93c, PIN_INPUT_PULLUP | MUX_MODE0) /* (L15) gmii1_rxd1.gmii1_rxd1 */
  		AM33XX_IOPAD(0x938, PIN_INPUT_PULLUP | MUX_MODE0) /* (L16) gmii1_rxd2.gmii1_rxd2 */
  		AM33XX_IOPAD(0x934, PIN_INPUT_PULLUP | MUX_MODE0) /* (L17) gmii1_rxd3.gmii1_rxd3 */

		/* Slave 2 */
		AM33XX_IOPAD(0x78, PIN_INPUT | MUX_MODE1)  /* (U18) gpmc_be1n.gmii2_col */
		AM33XX_IOPAD(0x70, PIN_INPUT | MUX_MODE1)  /* (T17) gpmc_wait0.gmii2_crs */
		AM33XX_IOPAD(0x74, PIN_INPUT_PULLUP | MUX_MODE1)  /* (U17) gpmc_wpn.gmii2_rxer */
		AM33XX_IOPAD(0x40, PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* gpmc_a0.rgmii2_tctl */
		AM33XX_IOPAD(0x44, PIN_INPUT_PULLDOWN | MUX_MODE2)	/* gpmc_a1.rgmii2_rctl */
		AM33XX_IOPAD(0x48, PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* gpmc_a2.rgmii2_td3 */
		AM33XX_IOPAD(0x4c, PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* gpmc_a3.rgmii2_td2 */
		AM33XX_IOPAD(0x50, PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* gpmc_a4.rgmii2_td1 */
		AM33XX_IOPAD(0x54, PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* gpmc_a5.rgmii2_td0 */
		AM33XX_IOPAD(0x58, PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* gpmc_a6.rgmii2_tclk */
		AM33XX_IOPAD(0x5c, PIN_INPUT_PULLDOWN | MUX_MODE2)	/* gpmc_a7.rgmii2_rclk */
		AM33XX_IOPAD(0x60, PIN_INPUT_PULLDOWN | MUX_MODE2)	/* gpmc_a8.rgmii2_rd3 */
		AM33XX_IOPAD(0x64, PIN_INPUT_PULLDOWN | MUX_MODE2)	/* gpmc_a9.rgmii2_rd2 */
		AM33XX_IOPAD(0x68, PIN_INPUT_PULLDOWN | MUX_MODE2)	/* gpmc_a10.rgmii2_rd1 */
		AM33XX_IOPAD(0x6c, PIN_INPUT_PULLDOWN | MUX_MODE2)	/* gpmc_a11.rgmii2_rd0 */
  	>;
  };
  
	/*currently not used */
	mii2_pins_default: mii2_pins_default
	{
	pinctrl-single,pins = <
		AM33XX_IOPAD(0x78, PIN_INPUT | MUX_MODE1) /* (U18) gpmc_be1n.gmii2_col */
		AM33XX_IOPAD(0x70, PIN_INPUT | MUX_MODE1) /* (T17) gpmc_wait0.gmii2_crs */
		AM33XX_IOPAD(0x74, PIN_INPUT | MUX_MODE1) /* (U17) gpmc_wpn.gmii2_rxer */
		AM33XX_IOPAD(0x40, PIN_OUTPUT | MUX_MODE1) /* (R13) gpmc_a0.gmii2_txen */
		AM33XX_IOPAD(0x44, PIN_INPUT | MUX_MODE1) /* (V14) gpmc_a1.gmii2_rxdv */
		AM33XX_IOPAD(0x58, PIN_INPUT | MUX_MODE1) /* (U15) gpmc_a6.gmii2_txclk */
		AM33XX_IOPAD(0x5c, PIN_INPUT | MUX_MODE1) /* (T15) gpmc_a7.gmii2_rxclk */
		AM33XX_IOPAD(0x54, PIN_OUTPUT | MUX_MODE1) /* (V15) gpmc_a5.gmii2_txd0 */
		AM33XX_IOPAD(0x50, PIN_OUTPUT | MUX_MODE1) /* (R14) gpmc_a4.gmii2_txd1 */
		AM33XX_IOPAD(0x4c, PIN_OUTPUT | MUX_MODE1) /* (T14) gpmc_a3.gmii2_txd2 */
		AM33XX_IOPAD(0x48, PIN_OUTPUT | MUX_MODE1) /* (U14) gpmc_a2.gmii2_txd3 */
		AM33XX_IOPAD(0x6c, PIN_INPUT | MUX_MODE1) /* (V17) gpmc_a11.gmii2_rxd0 */
		AM33XX_IOPAD(0x68, PIN_INPUT | MUX_MODE1) /* (T16) gpmc_a10.gmii2_rxd1 */
		AM33XX_IOPAD(0x64, PIN_INPUT | MUX_MODE1) /* (U16) gpmc_a9.gmii2_rxd2 */
		AM33XX_IOPAD(0x60, PIN_INPUT | MUX_MODE1) /* (V16) gpmc_a8.gmii2_rxd3 */
	>;
	};
  
	/*currently not used */
	cpsw_default: cpsw_default 
	{
	pinctrl-single,pins = <
		/* Slave 1 */
		/*AM33XX_IOPAD(0x108, PIN_INPUT | MUX_MODE0) */ /* (H16) gmii1_col.gmii1_col */
		/*AM33XX_IOPAD(0x10c, PIN_INPUT | MUX_MODE0) */ /* (H17) gmii1_crs.gmii1_crs */
		/*AM33XX_IOPAD(0x110, PIN_INPUT | MUX_MODE0) */ /* (J15) gmii1_rxer.gmii1_rxer */
		AM33XX_IOPAD(0x114, PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* mii1_txen.rgmii1_tctl */
		AM33XX_IOPAD(0x118, PIN_INPUT_PULLDOWN | MUX_MODE2)	/* mii1_rxdv.rgmii1_rctl */
		AM33XX_IOPAD(0x11c, PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* mii1_txd3.rgmii1_td3 */
		AM33XX_IOPAD(0x120, PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* mii1_txd2.rgmii1_td2 */
		AM33XX_IOPAD(0x124, PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* mii1_txd1.rgmii1_td1 */
		AM33XX_IOPAD(0x128, PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* mii1_txd0.rgmii1_td0 */
		AM33XX_IOPAD(0x12c, PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* mii1_txclk.rgmii1_tclk */
		AM33XX_IOPAD(0x130, PIN_INPUT_PULLDOWN | MUX_MODE2)	/* mii1_rxclk.rgmii1_rclk */
		AM33XX_IOPAD(0x134, PIN_INPUT_PULLDOWN | MUX_MODE2)	/* mii1_rxd3.rgmii1_rd3 */
		AM33XX_IOPAD(0x138, PIN_INPUT_PULLDOWN | MUX_MODE2)	/* mii1_rxd2.rgmii1_rd2 */
		AM33XX_IOPAD(0x13c, PIN_INPUT_PULLDOWN | MUX_MODE2)	/* mii1_rxd1.rgmii1_rd1 */
		AM33XX_IOPAD(0x140, PIN_INPUT_PULLDOWN | MUX_MODE2)	/* mii1_rxd0.rgmii1_rd0 */

		/* Slave 2 */
		/*AM33XX_IOPAD(0x78, PIN_INPUT | MUX_MODE1) */ /* (U18) gpmc_be1n.gmii2_col */
		/*AM33XX_IOPAD(0x70, PIN_INPUT | MUX_MODE1) */ /* (T17) gpmc_wait0.gmii2_crs */
		/*AM33XX_IOPAD(0x74, PIN_INPUT | MUX_MODE1) */ /* (U17) gpmc_wpn.gmii2_rxer */
		AM33XX_IOPAD(0x40, PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* gpmc_a0.rgmii2_tctl */
		AM33XX_IOPAD(0x44, PIN_INPUT_PULLDOWN | MUX_MODE2)	/* gpmc_a1.rgmii2_rctl */
		AM33XX_IOPAD(0x48, PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* gpmc_a2.rgmii2_td3 */
		AM33XX_IOPAD(0x4c, PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* gpmc_a3.rgmii2_td2 */
		AM33XX_IOPAD(0x50, PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* gpmc_a4.rgmii2_td1 */
		AM33XX_IOPAD(0x54, PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* gpmc_a5.rgmii2_td0 */
		AM33XX_IOPAD(0x58, PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* gpmc_a6.rgmii2_tclk */
		AM33XX_IOPAD(0x5c, PIN_INPUT_PULLDOWN | MUX_MODE2)	/* gpmc_a7.rgmii2_rclk */
		AM33XX_IOPAD(0x60, PIN_INPUT_PULLDOWN | MUX_MODE2)	/* gpmc_a8.rgmii2_rd3 */
		AM33XX_IOPAD(0x64, PIN_INPUT_PULLDOWN | MUX_MODE2)	/* gpmc_a9.rgmii2_rd2 */
		AM33XX_IOPAD(0x68, PIN_INPUT_PULLDOWN | MUX_MODE2)	/* gpmc_a10.rgmii2_rd1 */
		AM33XX_IOPAD(0x6c, PIN_INPUT_PULLDOWN | MUX_MODE2)	/* gpmc_a11.rgmii2_rd0 */
	>;
	};

	cpsw_sleep: cpsw_sleep 
	{
		pinctrl-single,pins = <
			/* Slave 1 reset value */
			AM33XX_IOPAD(0x114, PIN_INPUT_PULLDOWN | MUX_MODE7)
			AM33XX_IOPAD(0x118, PIN_INPUT_PULLDOWN | MUX_MODE7)
			AM33XX_IOPAD(0x11c, PIN_INPUT_PULLDOWN | MUX_MODE7)
			AM33XX_IOPAD(0x120, PIN_INPUT_PULLDOWN | MUX_MODE7)
			AM33XX_IOPAD(0x124, PIN_INPUT_PULLDOWN | MUX_MODE7)
			AM33XX_IOPAD(0x128, PIN_INPUT_PULLDOWN | MUX_MODE7)
			AM33XX_IOPAD(0x12c, PIN_INPUT_PULLDOWN | MUX_MODE7)
			AM33XX_IOPAD(0x130, PIN_INPUT_PULLDOWN | MUX_MODE7)
			AM33XX_IOPAD(0x134, PIN_INPUT_PULLDOWN | MUX_MODE7)
			AM33XX_IOPAD(0x138, PIN_INPUT_PULLDOWN | MUX_MODE7)
			AM33XX_IOPAD(0x13c, PIN_INPUT_PULLDOWN | MUX_MODE7)
			AM33XX_IOPAD(0x140, PIN_INPUT_PULLDOWN | MUX_MODE7)

			/* Slave 2 reset value*/
			AM33XX_IOPAD(0x40, PIN_INPUT_PULLDOWN | MUX_MODE7)
			AM33XX_IOPAD(0x44, PIN_INPUT_PULLDOWN | MUX_MODE7)
			AM33XX_IOPAD(0x48, PIN_INPUT_PULLDOWN | MUX_MODE7)
			AM33XX_IOPAD(0x4c, PIN_INPUT_PULLDOWN | MUX_MODE7)
			AM33XX_IOPAD(0x50, PIN_INPUT_PULLDOWN | MUX_MODE7)
			AM33XX_IOPAD(0x54, PIN_INPUT_PULLDOWN | MUX_MODE7)
			AM33XX_IOPAD(0x58, PIN_INPUT_PULLDOWN | MUX_MODE7)
			AM33XX_IOPAD(0x5c, PIN_INPUT_PULLDOWN | MUX_MODE7)
			AM33XX_IOPAD(0x60, PIN_INPUT_PULLDOWN | MUX_MODE7)
			AM33XX_IOPAD(0x64, PIN_INPUT_PULLDOWN | MUX_MODE7)
			AM33XX_IOPAD(0x68, PIN_INPUT_PULLDOWN | MUX_MODE7)
			AM33XX_IOPAD(0x6c, PIN_INPUT_PULLDOWN | MUX_MODE7)
		>;

	};
	
  mmc0_pins_default: mmc0_pins_default
  {
  	pinctrl-single,pins = <
  		AM33XX_IOPAD(0x100, PIN_INPUT | MUX_MODE0) /* (G17) mmc0_clk.mmc0_clk */
  		AM33XX_IOPAD(0x104, PIN_INPUT | MUX_MODE0) /* (G18) mmc0_cmd.mmc0_cmd */
  		AM33XX_IOPAD(0xfc, PIN_INPUT | MUX_MODE0) /* (G16) mmc0_dat0.mmc0_dat0 */
  		AM33XX_IOPAD(0xf8, PIN_INPUT | MUX_MODE0) /* (G15) mmc0_dat1.mmc0_dat1 */
  		AM33XX_IOPAD(0xf4, PIN_INPUT | MUX_MODE0) /* (F18) mmc0_dat2.mmc0_dat2 */
  		AM33XX_IOPAD(0xf0, PIN_INPUT | MUX_MODE0) /* (F17) mmc0_dat3.mmc0_dat3 */
  	>;
  };

  mmc1_pins_default: mmc1_pins_default
  {
  	pinctrl-single,pins = <
  		AM33XX_IOPAD(0x80, PIN_INPUT | MUX_MODE2) /* (U9) gpmc_csn1.mmc1_clk */
  		AM33XX_IOPAD(0x84, PIN_INPUT | MUX_MODE2) /* (V9) gpmc_csn2.mmc1_cmd */
  		AM33XX_IOPAD(0x0, PIN_INPUT | MUX_MODE1) /* (U7) gpmc_ad0.mmc1_dat0 */
  		AM33XX_IOPAD(0x4, PIN_INPUT | MUX_MODE1) /* (V7) gpmc_ad1.mmc1_dat1 */
  		AM33XX_IOPAD(0x8, PIN_INPUT | MUX_MODE1) /* (R8) gpmc_ad2.mmc1_dat2 */
  		AM33XX_IOPAD(0xc, PIN_INPUT | MUX_MODE1) /* (T8) gpmc_ad3.mmc1_dat3 */
  		AM33XX_IOPAD(0x10, PIN_INPUT | MUX_MODE1) /* (U8) gpmc_ad4.mmc1_dat4 */
  		AM33XX_IOPAD(0x14, PIN_INPUT | MUX_MODE1) /* (V8) gpmc_ad5.mmc1_dat5 */
  		AM33XX_IOPAD(0x18, PIN_INPUT | MUX_MODE1) /* (R9) gpmc_ad6.mmc1_dat6 */
  		AM33XX_IOPAD(0x1c, PIN_INPUT | MUX_MODE1) /* (T9) gpmc_ad7.mmc1_dat7 */
  	>;
  };

  myrtc1_pins_default: myrtc1_pins_default
  {
  	pinctrl-single,pins = <
  		AM33XX_IOPAD(0x1f8, PIN_INPUT | MUX_MODE0) /* (B5) RTC_PORz.RTC_PORz */
  		AM33XX_IOPAD(0x200, PIN_OUTPUT | MUX_MODE0) /* (C5) EXT_WAKEUP.EXT_WAKEUP */
  		AM33XX_IOPAD(0x1fc, PIN_INPUT | MUX_MODE0) /* (C6) PMIC_POWER_EN.PMIC_POWER_EN */
  		AM33XX_IOPAD(0x204, PIN_INPUT | MUX_MODE0) /* (B4) ENZ_KALDO_1P8V.ENZ_KALDO_1P8V */
  	>;
  };

  spi0_pins_default: spi0_pins_default
  {
  	pinctrl-single,pins = <
  		AM33XX_IOPAD(0x150, PIN_INPUT | MUX_MODE0) /* (A17) spi0_sclk.spi0_sclk */
  		AM33XX_IOPAD(0x154, PIN_INPUT | MUX_MODE0) /* (B17) spi0_d0.spi0_d0 */
  		AM33XX_IOPAD(0x158, PIN_INPUT | MUX_MODE0) /* (B16) spi0_d1.spi0_d1 */
  		AM33XX_IOPAD(0x15c, PIN_INPUT | MUX_MODE0) /* (A16) spi0_cs0.spi0_cs0 */
  		AM33XX_IOPAD(0x160, PIN_INPUT | MUX_MODE0) /* (C15) spi0_cs1.spi0_cs1 */
  	>;
  };

  spi1_pins_default: spi1_pins_default
  {
  	pinctrl-single,pins = <
  		AM33XX_IOPAD(0x190, PIN_INPUT | MUX_MODE3) /* (A13) mcasp0_aclkx.spi1_sclk */
  		AM33XX_IOPAD(0x194, PIN_INPUT | MUX_MODE3) /* (B13) mcasp0_fsx.spi1_d0 */
  		AM33XX_IOPAD(0x198, PIN_INPUT | MUX_MODE3) /* (D12) mcasp0_axr0.spi1_d1 */
  		AM33XX_IOPAD(0x144, PIN_INPUT | MUX_MODE2) /* (H18) rmii1_refclk.spi1_cs0 */
  		AM33XX_IOPAD(0x164, PIN_INPUT | MUX_MODE2) /* (C18) eCAP0_in_PWM0_out.spi1_cs1 */
  	>;
  };

  uart0_pins_default: uart0_pins_default
  {
  	pinctrl-single,pins = <
  		AM33XX_IOPAD(0x170, PIN_INPUT | MUX_MODE0) /* (E15) uart0_rxd.uart0_rxd */
  		AM33XX_IOPAD(0x174, PIN_OUTPUT | MUX_MODE0) /* (E16) uart0_txd.uart0_txd */
  	>;
  };

  myusb1_pins_default: myusb1_pins_default
  {
  	pinctrl-single,pins = <
  		AM33XX_IOPAD(0x234, PIN_OUTPUT | MUX_MODE0) /* (F15) USB1_DRVVBUS.USB1_DRVVBUS */
  	>;
  };

  myusb2_pins_default: myusb2_pins_default
  {
  	pinctrl-single,pins = <
  		AM33XX_IOPAD(0x21c, PIN_OUTPUT | MUX_MODE0) /* (F16) USB0_DRVVBUS.USB0_DRVVBUS */
  	>;
  };

}; /*am33xx_pinmux*/

&lcdc
{
/*	status = "okay"; */
};

&i2c0
{
  pinctrl-0 = <&i2c0_pins>;
  baseboard_eeprom: baseboard_eeprom@50
  {
    compatible = "at,24c256";
    reg = <0x50>;

    #address-cells = <1>;
    #size-cells = <1>;
    baseboard_data: baseboard_data@0
    {
      reg = <0 0x100>;
    };
  };


};

&i2c1
{
	pinctrl-0 = <&i2c1_pins>;
  status = "okay";
};


&ocp
{
   compatible = "bone-pinmux-helper";
		status = "okay";
		pinctrl-names = "gpio0", "gpio1", "gpio2", "gpio3", "debug", "glue", "emmc_rst", "spi0_int", "spi1_int";
		pinctrl-0 = <&mygpio0_pins_default>;
		pinctrl-1 = <&mygpio1_pins_default>;
		pinctrl-2 = <&mygpio2_pins_default>;
		pinctrl-3 = <&mygpio3_pins_default>;
		pinctrl-4 = <&mydebugss1_pins_default>;
		pinctrl-5 = <&myglue1_pins_default>;
		pinctrl-6 = <&emmc_rst_pin_default>;
    pinctrl-7 = <&spi0_int_pin_default>;
    pinctrl-8 = <&spi1_int_pin_default>;
};



/ {

	model = "Seaeye eManip Arm controller";
	compatible = "oct,osd335x-reference-design", "ti,am335x-bone", "ti,am33xx";


};