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OSD62x-PM Power Design and Budgeting
Published: December 12, 2025 By: Greg Sheridan
This application note demonstrates a complete example implementation of the OSD62x-PM power design using the OSD62-PM-BRK reference platform. It builds upon the principles described in OSD62x-PM Power Application Note and provides real-world performance, and power budgeting guidance. It also provides a brief discussion on battery power. It assumes you have read and are familiar with the previous note. It focuses on the TPS6521903 PMIC from TI and explains how it was used. This guide is best used in conjunction with the schematics for the OSD62-PM-BRK.
There are multiple TPS65219 PMIC versions that differ in output voltage and PMIC configuration. So, the right version of the PMIC needs to be chosen based on the application requirements. There are several design choices that set up the grouping, sequencing, and operating voltage levels for the OSD62x-PM inputs. This section will walk you through example design specifications and implementation of the OSD62-PM-BRK development platform.
Table 2‑1: OSD62-PM-BRK Design Specifications
| Parameter | Design Specification | Notes |
|---|---|---|
| VDD_CORE | 0.75V | Target 1.2GHz operation |
| VDDS_DDR | 1.2V | Target DDR4 inside OSD62x-PM |
| DDR_VPP | 2.5V | Power supply for DDR4 |
| Partial IO power mode | Not used | Allows connecting VDD_CANUART to 0.75V rail with other CORE voltages |
| Allows connecting VDDSHV_CANUART to 1.8V/3.3V SHV domain supplies along with other VDDSHVx rails | ||
| VDDSHV_CANUART | 3.3V | Use 3.3V IO for all IO domains |
| VDDSHV_MCU | ||
| VDDSHV[0-4] and VDDSHV6 | ||
| VPP | 1.8V | Need provision to supply this voltage rail externally controlled by AM62x IO |
| CSIRX0 | CSI used for camera | VDDA_CORE_CSIRX0 needs to be connected to 0.75V supply |
| VDDA_1P8_CSIRX0 needs to be connected to 1.8V supply | ||
| USB0 and USB1 | Used for device and host ports | VDDA_CORE_USB needs to be connected to 0.75V supply |
| VDDA_1P8_USB needs to be connected to 1.8V supply | ||
| VDDA_3P3_USB needs to be connected to 3.3V supply | ||
| Board input voltage | 5V | The board can be powered using a USB-C cable or header pins |
| Micro-SD card | Support UHS-1 speed | Need IO control over SD card 3.3V VDD power input |
| VDDHSV5 | Support UHS-1 speed | Need VDDSHV5 to be able to switch between 1.8V and 3.3V |
Based on the above specifications and OSD62x-PM current requirements, here are the power rail groupings:
Table 2‑2: OSD62x-PM Power Input Grouping and Specification
| Power Rail Group | Voltage |
|---|---|
| VDD_CORE, VDDA_CORE_CSIRX0, VDDA_CORE_USB, VDD_CANUART | 0.75V |
| VDDS_DDR | 1.2V |
| DDR_VPP | 2.5V |
| VDDR_CORE | 0.85V |
| VDDSHV_CANUART, VDDSHV_MCU, VDDSHV[0-4] and VDDSHV6 | 3.3V |
| VPP | 1.8V – RAIL2 |
| VDDA_1P8_CSIRX0, VDDA_1P8_OLDI0, VDDA_1P8_USB, VDDA_PLL[0-2], VDDA_MCU, VDDS_OSC0, VDDA_TEMP | 1.8V – RAIL1 |
| VDDA_3P3_USB | 3.3V |
| VDDSHV5 | 1.8V and 3.3V(1) |
| Board input voltage | 5V |
| Micro-SD card power supply | 3.3V(2) |
These specifications correspond to the TPS6521903 PMIC.
The following block diagram shows the connection diagram between TPS6521903 and OSD62-PM.
VIN_5P0 is the main power rail coming from either the USB-C UFP (Upstream Facing Port; 3A request) or through BRK’s header input pins.
The TLV62595 regulator converts the 5V input down to 3.3V, which powers the PMIC and the rest of the OSD62-PM-BRK through a Load Switch.
Since all the PMIC outputs are < 2.6V (3.3V – 0.7V [Max VHEADROOM_PWM]), 3.3V can be used as the main PMIC input voltage to increase power efficiency.
LDO1 of the TPS6521903 can act as an LDO or load switch which allows it to operate at both 1.8V and 3.3V. Since it is capable of dynamically switching its output voltage between 3.3V and 1.8V, this power rail is used to power VDDSHV5 (MMC1) to allow the SD Card to support UHS-1 speeds.
LDO2 input is provided by the output of BUCK2 (1.8V) to increase efficiency. (Note: Due to sequencing issues, BUCK3 (1.2V) cannot be used as the input for LDO2 even though it meets the drop-out requirements.)
The OSD62-PM-BRK runs the rest of the Core voltages at 0.75V and so VDDR_CORE is grouped by itself. If your application requires running all CORE voltages at 0.85V (ie you need to run at 1400MHz), a different PMIC variant can be used and VDDR_CORE can be combined with the other CORE power rails.
LDO2 also powers VDDR_CORE which requires a 0.85V.
LDO3 powers all the 1.8V inputs of various subsystems of the AM62x SoC.
It also powers (2) oscillators generating 25MHz and 32kHz connected on the MCU_OSC0 and WKUP_LFOSC0 interfaces, respectively.
LDO4 (2.5V) powers the DDR_VPP rail for OSD62x-PM and could be used for other system components if required by the application.
The BUCK1 output of the TPS6521903 is used to power all the CORE voltages (VDD_CORE, VDD_CANUART, VDDA_CORE_USB, VDDA_CORE_CSIRX0) at 0.75V.
BUCK2 provides the input voltage to LDO2. It could be used as an option to power one of the VDDSHV domains if 1.8V signaling is needed. However, this is not supported on the OSD62-PM-BRK.
The BUCK3 output (1.2V) of the TPS6521903 powers the DDR voltage inputs of AM62x SoC and DDR4 inside OSD62x-PM. The OSD62x-PM uses DDR4 and not LPDDR4, so the input voltage on VDDS_DDR must be 1.2V.
The GPO2 pin of the TPS6521903 is used to enable the 3.3V supply to the SiP and rest of the board via the TPS22965 load switch. This allows the 3.3V rail to the system to meet AM62x/OSD62x-PM sequencing requirements.
The load switch is used to control the 3.3V power to the rest of the OSD62-PM-BRK to ensure sequencing timing is met. It’s output is VIN-3P3-LS.
The load switch provides 3.3V to VDDSHV domains 1-4. This causes all of the OSD62x-PM I/O to use 3.3V signaling except for MMC1.
It also provides power to the TPS22918 Load Switch, TLV75518 LDO, and other onboard devices external to the OSD62x-PM. These devices include two (2) ADCs, an EEPROM, a Camera Interface, and other devices through the 100 mil expansion headers. This satisfies the requirement that the same voltage rail powers both the device and the IO domain that the device is connected to.
An IO controlled load switch, powered by VIN-3P3-LS, is used to power the SD card slot so that the card can be power cycled when changing IO voltages.
An IO controlled LDO, powered by VIN-3P3-LS, used to power the VPP input to meet the sequencing requirements when programming the OTP registers of the AM62x.
VIN-5P0 is supplied from both the USB-C UFP (UFP port requests 3A @ 5V but does not check the actual current provided) and the 100 mil expansion headers.
VIN-5P0 powers the USB-C DFP port. The USB-C DFP port advertises 500mA but there are no constraints on the power path. However, enough current must be provided through the USB-C UFP plus the 100 mil expansion headers to support the current needs of the USB-C DFP plus the rest of the OSD62-PM-BRK (typically between 300 – 450mA).
In addition to the above power connections, the following figure shows the PMIC-OSD62x-PM signal interface connections:
As shown in the diagram, the TPS6521903 has the following multifunction pin configuration:
Table 4‑1: TPS65219 Multi-function Pin Configuration
| TPS6521903 Pin Name | Function | Description |
|---|---|---|
| EN/PB/VSENSE | PB | Falling edge power button input |
| MODE/RESET | RESET | Active LOW WARM RESET input to the PMIC |
| MODE/STBY | MODE and STBY | Active LOW Auto-PFM (Pulse Frequency Modulation) Standby mode input to the PMIC. Needs pull-up before power-up sequence is complete. |
| VSEL_SD/VSEL_DDR | VSEL_SD | SD Card voltage select input to output on LDO1. 3.3V output on LDO1 when this pin is HIGH. 1.8V output on LDO1 when this pin is LOW. Needs pull-up before power-up sequence is complete. |
Please note the following for the connections between the TPS6521903 and the OSD62x-PM:
Finally, the power sequence of the TPS6521903, which satisfies the requirements for the OSD62x-PM, is shown below:
The above description of the OSD62-PM-BRK power design is only one way of designing a power system for the OSD62x-PM with the TPS65219. There are several other variants of the PMIC that allow for different configurations and design parameters.
Detailed configuration and register settings for TPS6521903 can be found here: https://www.ti.com/lit/ug/slvucj2a/slvucj2a.pdf
Other versions of TPS65219 that can be used for the OSD62x-PM: TPS6521901, TPS6521904, TPS6521907. This is due to the requirement for DDR4 support (i.e. LPDDR4 is not supported on the OSD62x-PM).
The following resources provide additional information and design help for powering the OSD62x-PM. While the following documents target the AM62x SoC, the information also applies to the OSD62x-PM.
If none of the variants of the TPS65219 satisfy your design requirements of your OSD62x-PM design, a user programmable version of the PMIC, the TPS6521905, can be used. This version of the PMIC is un-programmed out of the box. The following are reference documents for this version of the PMIC:
The power consumption of a system designed with the OSD62x-PM is highly dependent on gating, utilization of various subsystems, and operating performance points. Power consumption may vary vastly depending on these factors. Creating a power budget is recommended to understand the power consumption of the design and improve system reliability and robustness. The main advantages of a power budget are:
There are 3 main aspects of power budgeting when designing with the OSD62x-PM:
The following sections show an example power budget analysis for the OSD62-PM-BRK.
In this analysis, the worst-case power consumption of each power rail is calculated to ensure that the power supply can support the worst-case scenario. The following table shows the maximum current rating of devices present on the OSD62-PM-BRK to be used in this analysis.
Table 7‑1: Worst-case Current Consumption of Devices on OSD62-PM-BRK
| Device | Power Rail | Worst-case Current Consumption (mA) |
|---|---|---|
| USB-C DFP | VIN-5P0 | 500 |
| SD Card (UHS-1) | VIN-3P3-LS | 300 |
| EEPROM (24AA32AT) | VIN-3P3-LS | 3 |
| Camera (OV5640) | VIN-3P3-LS | 200 |
| ADC121C027 x2 | VIN-3P3-LS | 2.4 |
| 25MHz OSC (SIT8008BI-73-YYS-25.000000) | LDO3-1P8 | 4.5 |
| 32KHz OSC (SIT1533AI-H4-D14-32.768) | LDO3-1P8 | <1 |
In addition to the above information, you will want to get the maximum current consumption for the AM62x SoC power rails found in OSD62x-PM Power Specifications Table in the . The following table shows the maximum current consumption on each of the power rails in the power system for the OSD62-PM-BRK and the maximum current that each power rail supports according to the regulator specifications. See Figure 1 for the power architecture of the OSD62-PM-BRK to help with power calculations.
Table 7‑2: OSD62-PM-BRK Worst-Case Power Budget Analysis
| Voltage Rail | Output Voltage (V) | Maximum Current Capacity (mA) | OSD62-PM-BRK Worst-Case Current Consumption (mA) | OSD62-PM-BRK Worst-Case Power Consumption (mW)(3) | Calculation |
|---|---|---|---|---|---|
| VIN-3P3-LS(1) | 3.3 | 4000 | 1145 | 3780 | PInput = (3.3 * 1145) |
| BUCK1 | 0.75 | 3500 | 2710 | 2391 | PInput = (0.75 * 2710) / 0.85(3) |
| BUCK2 | 1.8 | 2000 | 150 | 318 | PInput = (1.8 * 150) / 0.85(3) |
| BUCK3 | 1.2 | 2000 | 800 | 1129 | PInput = (1.2 * 800) / 0.85(3) |
| LDO1 | 3.3/1.8 | 400 | 30 | 99 | PInput = (3.3 * 30) (4) |
| LDO2 | 0.85 | 400 | 150(2) | - | PInput = (3.3 * 0) (4) |
| LDO3 | 1.8 | 300 | 155 | 512 | PInput = (3.3 * 155) (4) |
| LDO4 | 2.5 | 300 | 60 | 198 | PInput = (3.3 * 60) (4) |
| VIN-3P3 | 3.3 | 4000 | 3004 | 9914 | PInput = (Sum Above PInput) / 0.85(4) |
| VIN-5P0 | 5 | - | 2483(5)(6) | 12414 | PInput = (PInput VIN-3P3) + (5 * 500) |
The total worst case power consumption for the board comes to 12.4W. While the calculation is correct, this should not be considered a valid power consumption of the board at any stage. It is improbable to maximize current consumption of all power rails for almost any use case. This analysis is useful for checking individual power rail capacity to make sure that there is enough head room for each regulator to be able to supply worst case scenario currents. It guarantees that under recommended operating conditions, there is no possibility of latch-up or power failure due to the current draw on any single power rail.
In this analysis, nominal currents are determined and used to generate a realistic maximum current consumption for a target application. This analysis represents a more accurate power profile for the board. For devices other than the OSD62x-PM, the nominal current consumptions can be extracted from their datasheets. However, the current consumption of the OSD62x-PM (AM62x SoC and DDR4) varies a lot based on application.
On the OSD62-PM-BRK, the following figure shows an example use case involving use of the camera and the display:
This example application involves the use of:
To determine the power of the AM62x SoC you first want to identify how the different cores are going to be used in the system. The following table shows the purpose of each internal core for this example application:
Table 7‑3: OSD62-PM-BRK Example Application Core Usage
| Core | Usage |
|---|---|
| A53 cores | Running Linux, number crunching and data movement |
| GPU | Image processing acceleration |
| R5F | Device Manager Firmware |
| M4F | Real time firmware |
To determine the power consumption of the AM62x SoC, TI provides a spreadsheet, the AM62x Power Estimation Tool, available for download here: https://www.ti.com/tool/AM62X-PET-CALC.
The following figure shows the parameter settings for this example use case for the OSD62-PM-BRK in the AM62 Power Estimation Tool:
The Operating Performance Point section allows for the definition of clock rates of different sub-systems of the SoC including A53, MCU, R5 PRU and GPU cores. In the above example, 1.25GHz is the chosen operating frequency for the OSD62-PM-BRK. The rest of the clock frequencies are set to their maximums.
The Processor Utilization section allows the user to define the usage of each core present in AM62x SoC between 0 and 100%. To account for general processing and acceleration, cores in this section are set to various levels of use as shown above.
For the peripheral usage section, DDR read/write, USB, MMC1, OLDI, and CSI interfaces are enabled with varying levels of usage. MCU_UART and MAIN_UART are also enabled.
The Estimated Power section shows the current consumption on various power rails of AM62x SoC as well as estimated junction temperature, based on the calculations of the spreadsheet.
Taking the above estimated power as well as nominal current consumption of the devices on the OSD62-PM-BRK, the following table shows this nominal use case power budget for each power rail of OSD62-PM-BRK board.
Table 7‑4: OSD62-PM-BRK Nominal Power Budget Analysis
| Voltage Rail | Voltage (V) | OSD62-PM-BRK Nominal Current Consumption (mA) | OSD62-PM-BRK Nominal Power Consumption (mW)(3) | Calculation |
|---|---|---|---|---|
| VIN-3P3-LS(1) | 3.3 | 250 | 825 | PInput = (3.3 * 250) |
| BUCK1 | 0.75 | 913 | 806 | PInput = (0.75 * 913) / 0.85(3) |
| BUCK2 | 1.8 | 10 | 21 | PInput = (1.8 * 10) / 0.85(3) |
| BUCK3 | 1.2 | 147 | 208 | PInput = (1.2 * 147) / 0.85(3) |
| LDO1 | 3.3/1.8 | 10 | 33 | PInput = (3.3 * 10) (4) |
| LDO2 | 0.85 | 10(2) | - | PInput = (3.3 * 0) (4) |
| LDO3 | 1.8 | 72 | 238 | PInput = (3.3 * 72) (4) |
| LDO4 | 2.5 | 10 | 33 | PInput = (3.3 * 10) (4) |
| VIN-3P3 | 3.3 | 656 | 2546 | PInput = (Sum Above PInput) / 0.85(3) |
| VIN-5P0 | 5 | 509 | 2546 | PInput = PInput VIN-3P3(5) |
The above analysis shows a maximum current consumption of approximately 0.5A on the 5V power rail (2.5W), i.e. the USB-C UFP in this example, for the target application defined.
The power analysis of the example application described previously was assumed to be powered by either the USB-C UFP or a 5V DC power supply over the 100mil external headers. If it was necessary for this application to be mobile, an analysis can be done to estimate battery life for this application based on the choice of battery.
In general, for battery operated applications, low power modes are used to increase battery life when the application does not need to be active. The low power mode chosen depends on the latency of wake-up and power consumption in this low power state versus the application requirements. The following assumptions can be made for the purpose of estimation:
Table 7‑5: Parameters Used for Battery Life Estimation Analysis
| Design Parameter | Specification Used for Analysis |
|---|---|
| Battery | 1S Li-Ion / LiPo (3.0V – 4.2V) |
| Battery capacity | 5000mAh |
| Low power mode | Deep Sleep |
| % of time spent in low power mode | 80% |
The deep sleep current consumption of the OSD62-PM-BRK is ~50mA. Assuming the 509mA current consumption for the example application in the previous section and taking into account the % of time spent in each mode, the average current consumption of the board can be calculated as follows:
(CurrentActive * PercentActive) + (CurrentSleep * PercentSleep) = (500 * 0.2) + (50 * 0.8) = 140mA
Total number of hours of battery operation:
5000mAh / 140mA = 35.7 hours
The above calculation assumes that the battery is directly connected to the VIN-5P0 input. However, the 1S battery voltage is below the minimum voltage that the OSD62-PM-BRK allows on the VIN-5P0. To understand, if this is possible, a number of items must be checked:
Based on analyzing the above items, it looks possible to run the application on a 1S battery, using the entire battery capacity, provided that the Camera and SD Card can run at a minimum of approximately 2.9V. If the Camera or SD Card could not function at that voltage, it would reduce the usable battery capacity and reduce the battery operation calculation.
The USB-C DFP cannot be used since, even at its maximum voltage of 4.2V, a 1S battery will not meet the minimum voltage requirements for USB, which is ok since this application does not use the USB-C DFP. If the application required using the USB-C DFP, then the 1S battery would need to be regulated up to 5V and the regulator losses would need to be considered in the battery operation calculation.
Unfortunately, a 2S Li-Ion / LiPo battery (6.0V to 8.4V) cannot be used directly since the voltage is above the input range for the TLV62595. If a 2S battery was required, then it would need to be regulated down to either 5V, if the USB-C DFP was required, or ~3.4V to ensure that the TLV62595 had minimal losses by using “100% Mode Operation”.
In this section, bench measurements of the approximate power consumption of the OSD62-PM-BRK in various power states are provided.
These are application-level measurements provided for reference. The OSD62-PM-BRK was not designed to support all low power modes. In particular, the Partial IO power mode is not implemented. There may be other design strategies and considerations when targeting an ultra low power implementation using the OSD62x-PM. References to resources are provided at the end of this section.
The following table shows approximate power consumption of OSD62-PM-BRK operating in various power states using the 100mil expansion header inputs and a bench power supply:
Table 8‑1: OSD62-PM-BRK Approximate Power Consumption Summary
| Power Mode | Approximate Current Consumption on 5V Input Rail (mA) | Approximate Power Consumption on 5V Input Rail (W) |
|---|---|---|
| OS Idle (1.4GHz VDD_CORE = 0.85V) | 300 | 1.5 |
| OS Idle (400MHz) | 290 | 1.45 |
| Deep Sleep | 50 | 0.25 |
| Stress-ng (All A53 cores + DDR) | 450 | 2.25 |
The following resources from TI provide more detailed information on current consumption in various Operation Performance Points and power states:
https://www.ti.com/lit/an/sprada6/sprada6.pdf
https://software-dl.ti.com/tisci/esd/latest/1_intro/TISCI.html
https://www.ti.com/lit/an/sluaak2/sluaak2.pdf
https://www.ti.com/lit/an/slvafd0b/slvafd0b.pdf
https://www.ti.com/lit/pdf/SPRSP58
https://www.ti.com/lit/pdf/SPRAD05
https://www.ti.com/lit/pdf/SPRAC76
https://www.ti.com/lit/pdf/SPRAD31
| Revision Number | Revision Date | Changes | Author |
|---|---|---|---|
| 1 | 6/25/2025 | Initial Release | Neeraj Dantu Erik Welsh |
There has been multiple revisions to the OSDZU3-REF and some of the documentation is for specific revisions.
The revision of your OSDZU3-REF is printed under the fan next to the Octavo Systems logo. See the image below.
If there are multiple versions of a document make sure you select the one that matches your revision.
